參數(shù)資料
型號: M4-32/32-12VI48
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: High Performance E 2 CMOS In-System Programmable Logic
中文描述: EE PLD, 12 ns, PQFP48
封裝: TQFP-48
文件頁數(shù): 20/46頁
文件大?。?/td> 754K
代理商: M4-32/32-12VI48
MACH 4 Family
27
BLOCK DIAGRAM – M4(LV)-128N/64 AND M4(LV)-128/64
Central
Switch
Matrix
4
2
CLK0/I0, CLK1/I1,
CLK2/I3, CLK3/I4
I2, I5
I/O0–I/O7
I/O8–I/O15
I/O16–I/O23
I/O24–I/031
I/O32–I/O39
I/O40–I/O47
I/O48–I/O55
I/O56–I/O63
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
Clock Generator
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
Clock Generator
Input Switch
Matrix
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
Clock Generator
Input Switch
Matrix
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
Clock Generator
Input Switch
Matrix
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
OE
16
24
16
8
33
4
8
Input Switch
Matrix
Input Switch
Matrix
Input Switch
Matrix
Clock Generator
Input Switch
Matrix
Input Switch
Matrix
Clock Generator
OE
Block
A
Block
B
Block
C
Block
D
Block
H
Block
G
Block
F
Block
E
17466H-022
相關PDF資料
PDF描述
M4-32/32-15JC High Performance E 2 CMOS In-System Programmable Logic
M4-32/32-15VC High Performance E 2 CMOS In-System Programmable Logic
M4-32/32-15VC48 High Performance E 2 CMOS In-System Programmable Logic
M4-32/32-18JI High Performance E 2 CMOS In-System Programmable Logic
M4-32/32-18VI High Performance E 2 CMOS In-System Programmable Logic
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