- 您現(xiàn)在的位置：買賣IC網 > PDF目錄383298 > M393T5663CZA-CF7 (SAMSUNG SEMICONDUCTOR CO. LTD.) DDR2 Registered SDRAM MODULE PDF資料下載
參數(shù)資料
| 型號： | M393T5663CZA-CF7 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | DDR2 Registered SDRAM MODULE |
| 中文描述： | 注冊的DDR2 SDRAM內存模塊 |
| 文件頁數(shù)： | 13/26頁 |
| 文件大?。?/td> | 618K |
| 代理商： | M393T5663CZA-CF7 |
Rev. 1.4 November 2007
RDIMM
DDR2 SDRAM
13 of 26
9.5 AC Input Test Conditions
Note:
1. Input waveform timing is referenced to the input signal crossing through the V
IH/IL
(AC)
level applied to the device under test.
2. The input signal minimum slew rate is to be maintained over the range from V
REF
to V
IH
(AC) min for rising edges and the range from V
REF
to V
IL
(AC)
max for falling edges as shown in the below figure.
3. AC timings are referenced with input waveforms switching from V
IL
(AC) to V
IH
(AC) on the positive transitions and V
IH
(AC) to V
IL
(AC) on the negative
transitions.
Symbol
Condition
Value
Units
Notes
V
REF
Input reference voltage
0.5 * V
DDQ
V
1
V
SWING(MAX)
Input signal maximum peak to peak swing
1.0
V
1
SLEW
Input signal minimum slew rate
1.0
V/ns
2, 3
V
DDQ
V
IH
(AC) min
V
IH
(DC) min
V
REF
V
IL
(DC) max
V
IL
(AC) max
V
SS
< AC Input Test Signal Waveform >
V
SWING(MAX)
delta TR
delta TF
V
REF
- V
IL
(AC) max
delta TF
Falling Slew =
Rising Slew =
V
IH
(AC) min - V
REF
delta TR
Note :
1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to
JESD51.2 standard.
2.
At 85 - 95
°
C operation temperature range, doubling refresh commands in frequency to a 32ms period ( tREFI=3.9 us ) is required, and to enter to self
refresh mode at this temperature range, an EMRS command is required to change internal refresh rate.
Symbol
Parameter
Rating
Units
Notes
TOPER
Operating Temperature
0 to 95
°
C
1, 2, 3
9.3 Input DC Logic Level
Symbol
Parameter
Min.
Max.
Units
Notes
V
IH
(DC)
DC input logic high
V
REF
+ 0.125
V
DDQ
+ 0.3
V
V
IL
(DC)
DC input logic low
- 0.3
V
REF
- 0.125
V
9.4 Input AC Logic Level
Symbol
Parameter
DDR2-400, DDR2-533
DDR2-667, DDR2-800
Units
Min.
Max.
Min.
Max.
V
IH
(AC)
AC input logic high
V
REF
+ 0.250
-
V
REF
+ 0.200
-
V
V
IL
(AC)
AC input logic low
-
V
REF
- 0.250
-
V
REF
- 0.200
V
9.2 Operating Temperature Condition
相關PDF資料 |
PDF描述 |
|---|---|
| M393T2953CZA-CCC | DDR2 Registered SDRAM MODULE 240pin Registered Module based on 512Mb C-die 72-bit ECC |
| M393T2953CZ3-CCC | 40 characters x 2 Lines, 5x7 Dot Matric Character and Cursor |
| M393T2950CZ3-CCC | 40 characters x 2 Lines, 5x7 Dot Matric Character and Cursor |
| M393T2950CZA-CCC | DDR2 Registered SDRAM MODULE 240pin Registered Module based on 512Mb C-die 72-bit ECC |
| M393T5750CZA-CCC | DDR2 Registered SDRAM MODULE 240pin Registered Module based on 512Mb C-die 72-bit ECC |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M393T5663QZ3 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 SDRAM Memory |
| M393T5663QZHA | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 SDRAM Memory |
| M393T5750BS0-CD5/CC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Registered SDRAM MODULE 240pin Registered Module based on 512Mb B-die 72-bit ECC |
| M393T5750BS3-CD5/CC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Registered SDRAM MODULE 240pin Registered Module based on 512Mb B-die 72-bit ECC |
| M393T5750BY0-CD5/CC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Registered SDRAM MODULE 240pin Registered Module based on 512Mb B-die 72-bit ECC |
發(fā)布緊急采購，3分鐘左右您將得到回復。