參數(shù)資料
型號: M390S2858DT1-C7A
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD
中文描述: 128Mx72 SDRAM的內(nèi)存與鎖相環(huán)
文件頁數(shù): 5/12頁
文件大?。?/td> 244K
代理商: M390S2858DT1-C7A
M390S2858CTU
Rev. 0.1 Sept. 2001
PC133/PC100 Low Profile Registered DIMM
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Voltage on any pin relative to Vss
V
IN
, V
OUT
-1.0 ~ 4.6
V
Voltage on V
DD
supply relative to Vss
V
DD
, V
DDQ
-1.0 ~ 4.6
V
Storage temperature
T
STG
-55 ~ +150
°
C
Power dissipation
P
D
36
W
Short circuit current
I
OS
50
mA
Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Note :
DC OPERATING CONDITIONS AND CHARACTERISTICS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= 0 to 70
°
C)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply voltage
V
DD
3.0
3.3
3.6
V
Input high voltage
V
IH
2.0
3.0
V
DDQ
+0.3
V
1
Input low voltage
V
IL
-0.3
0
0.8
V
2
Output high voltage
V
OH
2.4
-
-
V
I
OH
= -2mA
Output low voltage
V
OL
-
-
0.4
V
I
OL
= 2mA
Input leakage current
I
LI
-10
-
10
uA
3
CAPACITANCE
(V
DD
= 3.3V, T
A
= 23
°
C, f = 1MHz, V
REF
=1.4V
±
200
mV)
Parameter
Symbol
Min
Max
Unit
Input capacitance (A
0
~ A
12
)
Input capacitance (RAS, CAS, WE)
Input capacitance (CKE0)
Input capacitance (CLK0)
Input capacitance (CS0, CS2)
Input capacitance (DQM0 ~ DQM7)
Input capacitance (BA0 ~ BA1)
Data input/output capacitance (DQ0 ~ DQ63)
Data input/output capacitance (CB0 ~ CB7)
C
IN1
C
IN2
C
IN3
C
IN4
C
IN5
C
IN6
C
IN7
C
OUT
C
OUT
1
-
-
-
-
-
-
-
-
-
15
15
15
20
15
15
15
22
22
pF
pF
pF
pF
pF
pF
pF
pF
pF
1. V
IH
(max) = 5.6V AC. The overshoot voltage duration is
3ns.
2. V
IL
(min) = -2.0V AC. The undershoot voltage duration is
3ns.
3. Any input 0V
V
IN
V
DDQ.
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
Notes :
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