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參數(shù)資料
| 型號： | M38K29F8LFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 2/126頁 |
| 文件大?。?/td> | 2167K |
| 代理商： | M38K29F8LFP |
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38K2 Group User’s Manual
List of figures
Fig. 44 Structure of EP00 interrupt source register .............................................................. 1-39
Fig. 45 Structure of EP00 byte number register .................................................................... 1-40
Fig. 46 Structure of EP00 buffer area set register ................................................................ 1-40
Fig. 47 Structure of EP01 set register .................................................................................... 1-41
Fig. 48 Structure of EP01 control register 1 .......................................................................... 1-41
Fig. 49 Structure of EP01 control register 2 .......................................................................... 1-42
Fig. 50 Structure of EP01 control register 3 .......................................................................... 1-42
Fig. 51 Structure of EP01 interrupt source register .............................................................. 1-42
Fig. 52 Structure of EP01 byte number register 0 ................................................................ 1-43
Fig. 53 Structure of EP01 byte number register 1 ................................................................ 1-43
Fig. 54 Structure of EP01 MAX. packet size register ........................................................... 1-43
Fig. 55 Structure of EP01 buffer area set register ................................................................ 1-44
Fig. 56 Structure of EP02 set register .................................................................................... 1-45
Fig. 57 Structure of EP02 control register 1 .......................................................................... 1-45
Fig. 58 Structure of EP02 control register 2 .......................................................................... 1-46
Fig. 59 Structure of EP02 control register 3 .......................................................................... 1-46
Fig. 60 Structure of EP02 interrupt source register .............................................................. 1-46
Fig. 61 Structure of EP02 byte number register 0 ................................................................ 1-47
Fig. 62 Structure of EP02 byte number register 1 ................................................................ 1-47
Fig. 63 Structure of EP02 MAX. packet size register ........................................................... 1-47
Fig. 64 Structure of EP02 buffer area set register ................................................................ 1-48
Fig. 65 Structure of EP03 set register .................................................................................... 1-49
Fig. 66 Structure of EP03 control register 1 .......................................................................... 1-49
Fig. 67 Structure of EP03 control register 2 .......................................................................... 1-50
Fig. 68 Structure of EP03 control register 3 .......................................................................... 1-50
Fig. 69 Structure of EP03 interrupt source register .............................................................. 1-50
Fig. 70 Structure of EP03 byte number register 0 ................................................................ 1-51
Fig. 71 Structure of EP03 byte number register 1 ................................................................ 1-51
Fig. 72 Structure of EP03 MAX. packet size register ........................................................... 1-51
Fig. 73 Structure of EP03 buffer area set register ................................................................ 1-52
Fig. 74 Structure of EP10 stage register ................................................................................ 1-53
Fig. 75 Structure of EP10 control register 1 .......................................................................... 1-53
Fig. 76 Structure of EP10 control register 2 .......................................................................... 1-53
Fig. 77 Structure of EP10 control register 3 .......................................................................... 1-54
Fig. 78 Structure of EP10 interrupt source register .............................................................. 1-54
Fig. 79 Structure of EP10 byte number register .................................................................... 1-55
Fig. 80 Structure of EP10 buffer area set register ................................................................ 1-55
Fig. 81 Structure of EP11 set register .................................................................................... 1-56
Fig. 82 Structure of EP11 control register 1 .......................................................................... 1-56
Fig. 83 Structure of EP11 control register 2 .......................................................................... 1-56
Fig. 84 Structure of EP11 interrupt source register .............................................................. 1-57
Fig. 85 Structure of EP11 byte number register .................................................................... 1-57
Fig. 86 Structure of EP11 buffer area set register ................................................................ 1-57
Fig. 87 HUB functions ................................................................................................................ 1-58
Fig. 88 HUB function control circuit block diagram ............................................................... 1-59
Fig. 89 Block diagram of USB down-port peripheral circuits (D1+, D1-) ........................... 1-60
Fig. 90 Block diagram of USB down-port peripheral circuits (D2+, D2-) ........................... 1-60
Fig. 91 USB HUB interrupt control .......................................................................................... 1-61
Fig. 92 HUB related registers ................................................................................................... 1-62
Fig. 93 Structure of HUB interrupt source enable register .................................................. 1-63
Fig. 94 Structure of HUB interrupt source register ............................................................... 1-63
Fig. 95 Structure of HUB downstream port index register ................................................... 1-64
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| M38K29F8LHP | 功能描述:IC 740 MCU FLASH 32K 64LQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 產(chǎn)品培訓(xùn)模塊:MCU Product Line Introduction XMEGA Introduction AVR XMEGA USB Connectivity 標(biāo)準(zhǔn)包裝:90 系列:AVR® XMEGA 核心處理器:AVR 芯體尺寸:8/16-位 速度:32MHz 連通性:I²C，IrDA，SPI，UART/USART 外圍設(shè)備:欠壓檢測/復(fù)位，DMA，POR，PWM，WDT 輸入/輸出數(shù):50 程序存儲器容量:192KB（96K x 16） 程序存儲器類型:閃存 EEPROM 大小:4K x 8 RAM 容量:16K x 8 電壓 - 電源 (Vcc/Vdd):1.6 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 16x12b; D/A 2x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:64-TQFP 包裝:托盤 配用:ATSTK600-RC14-ND - STK600 SOCKET/ADAPTER 64TQFPATSTK600-TQFP64-ND - STK600 SOCKET/ADAPTER 64-TQFPATAVRONEKIT-ND - KIT AVR/AVR32 DEBUGGER/PROGRMMRATAVRISP2-ND - PROGRAMMER AVR IN SYSTEM |
| M38K29F8LHP#U0 | 功能描述:IC 740/38K2 MCU FLASH 64-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 產(chǎn)品培訓(xùn)模塊:CAN Basics Part-1 CAN Basics Part-2 Electromagnetic Noise Reduction Techniques Part 1 M16C Product Overview Part 1 M16C Product Overview Part 2 標(biāo)準(zhǔn)包裝:1 系列:M16C™ M32C/80/87 核心處理器:M32C/80 芯體尺寸:16/32-位 速度:32MHz 連通性:EBI/EMI，I²C，IEBus，IrDA，SIO，UART/USART 外圍設(shè)備:DMA，POR，PWM，WDT 輸入/輸出數(shù):121 程序存儲器容量:384KB（384K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:24K x 8 電壓 - 電源 (Vcc/Vdd):3 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 34x10b，D/A 2x8b 振蕩器型:內(nèi)部 工作溫度:-20°C ~ 85°C 封裝/外殼:144-LQFP 包裝:托盤 產(chǎn)品目錄頁面:749 (CN2011-ZH PDF) 配用:R0K330879S001BE-ND - KIT DEV RSK M32C/87 |
| M38K29F8LHP#UO | 制造商:Renesas Electronics Corporation 功能描述: |
| M38K29T-ADF | 功能描述:DEV TEMPORARY TARGET BOARD FOR M RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 配件 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 標(biāo)準(zhǔn)包裝:1 系列:- 附件類型:USB 至 1-Wire? RJ11 適配器 適用于相關(guān)產(chǎn)品:1-Wire? 設(shè)備 產(chǎn)品目錄頁面:1429 (CN2011-ZH PDF) |
| M38K29T-PAC | 制造商:Renesas Electronics Corporation 功能描述:DEV SIMPLE TOOL SYSTEM PKG FOR 38000/38K - Bulk |
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