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參數(shù)資料
| 型號(hào)： | M38D59GF-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 6/19頁 |
| 文件大小： | 2015K |
| 代理商： | M38D59GF-XXXFP |
Rev.3.04
May 20, 2008
REJ03B0158-0304
38D5 Group
FUNCTIONAL DESCRIPTION
Central Processing Unit (CPU)
The 38D5 Group uses the standard 740 Family instruction set.
Refer to the 740 Family Software Manual for details on the
instruction set.
Machine-resident 740 Family instructions are as follows:
The FST and SLW instructions cannot be used.
The STP, WIT, MUL, and DIV instructions can be used.
The central processing unit (CPU) has six registers. Figure 6
shows the 740 Family CPU register structure.
[Accumulator (A)]
The accumulator is an 8-bit register. Data operations such as
arithmetic data transfer, etc., are executed mainly through the
accumulator.
[Index Register X (X)]
The index register X is an 8-bit register. In the index addressing
modes, the value of the OPERAND is added to the contents of
register X and specifies the real address.
[Index Register Y (Y)]
The index register Y is an 8-bit register. In partial instruction, the
value of the OPERAND is added to the contents of register Y
and specifies the real address.
[Stack Pointer (S)]
The stack pointer is an 8-bit register used during subroutine calls
and interrupts. This register indicates start address of stored area
(stack) for storing registers during subroutine calls and
interrupts.
The low-order 8 bits of the stack address are determined by the
contents of the stack pointer. The high-order 8 bits of the stack
address are determined by the stack page selection bit. If the
stack page selection bit is “0”, the high-order 8 bits becomes
“0016”. If the stack page selection bit is “1”, the high-order 8 bits
becomes “0116”.
The operations of pushing register contents onto the stack and
popping them from the stack are shown in Figure 7.
Table 7 shows the push and pop instructions of accumulator or
processor status register.
Store registers other than those described in Figure 7 with
program when the user needs them during interrupts or
subroutine calls.
[Program Counter (PC)]
The program counter is a 16-bit counter consisting of two 8-bit
registers PCH and PCL. It is used to indicate the address of the
next instruction to be executed.
Fig. 6 740 Family CPU register structure
Processor status register (PS)
Carry flag
Zero flag
Interrupt disable flag
Decimal mode flag
Break flag
Index X mode flag
Overflow flag
Negative flag
b7
b0
b15
Program counter
Stack pointer
Index register Y
Index register X
Accumulator
A
X
Y
S
PCL
PCH
C
Z
I
D
B
T
V
N
b7
b0
b7
b0
b7
b0
b7
b0
b7
b0
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|---|---|
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