參數(shù)資料
型號： M38D59FFHP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 6.25 MHz, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁數(shù)： 56/142頁
文件大小： 2004K
代理商： M38D59FFHP
Rev.3.04
May 20, 2008
Page 20 of 134
REJ03B0158-0304
38D5 Group
I/O PORTS
Direction Registers (Ports P0-P6, P72-P74)
The I/O ports P0-P6, P72-P74 have direction registers which
determine the input/output direction of each individual pin. Each
bit in a direction register corresponds to one pin, each pin can be
set to be input port or output port.
When “0” is written to the bit of the direction register, the
corresponding pin becomes an input pin. As for ports P0
P3,
when “1” is written to the bit of the direction register and the
segment output disable register, the corresponding pin becomes
an output pin. As for ports P4
P6, P72-P74 when “1” is written to
the bit of the direction register, the corresponding pin becomes
an output pin.
If data is read from a pin set to output, the value of the port latch
is read, not the value of the pin itself. However, when peripheral
output (RTP1, RTP0, TXOUT1, TXOUT2, T4OUT, T3OUT and
T2OUT/CKOUT) is selected, the output value is read. Pins set to
input are floating. If a pin set to input is written to, only the port
output latch is written to and the pin remains floating.
Ports P70, P71
These are input ports which are shared with the voltage
multiplier. When these are read out at using the voltage
multiplier, the contents are “1”.
Pull-up Control
Each individual bit of ports P0
P3 can be pulled up with a
program by setting direction registers and segment output disable
registers 0 to 2 (addresses 0FF416 to 0FF616).
The pin is pulled up by setting “0” to the direction register and
“1” to the segment output disable register.
By setting the PULL registers (addresses 0FF016 to OFF216),
ports P4
P7 can control pull-up with a program.
However, the contents of PULL register do not affect ports
programmed as the output ports.
Fig. 12 Structure of ports P0 to P3
Fig. 13 Structure of PULL register and segment output
disable register
Segment output
disable register
Direction
register
Input port
No pull-up
Input port
Pull-up
Segment
output
Port output
“0”
“1”
Initial state
Note1: The PULL register and segment output disable register affect only ports
programmed as the input ports.
P60 pull-up
P61 pull-up
P62 pull-up
P63 pull-up
P64 pull-up
P65 pull-up
P66 pull-up
P67 pull-up
PULL register 2
(PULL2 : address 0FF116))
b7
b0
PULL register 1
(PULL1 : address 0FF016)
b7
b0
P50 pull-up
P51 pull-up
P52 pull-up
P53 pull-up
P54 pull-up
P55 pull-up
P56 pull-up
P57 pull-up
P40-P43 pull-up
P44-P47 pull-up
P72-P74 pull-up
Not used (do not write “1”)
Not used (return “0” when read)
PULL register 3
(PULL3 : address 0FF216))
b7
b0
P00 pull-up
P01 pull-up
P02 pull-up
P03 pull-up
P04 pull-up
P05 pull-up
P06 pull-up
P07 pull-up
Segment output disable register 0
(SEG0 : address 0FF416)
b7
b0
0 : No pull-up
1 : Pull-up
0 : No pull-up
1 : Pull-up
0 : No pull-up
1 : Pull-up
0 : No pull-up
1 : Pull-up
P20 pull-up
P21 pull-up
P22 pull-up
P23 pull-up
P24 pull-up
P25 pull-up
P26 pull-up
P27 pull-up
Segment output disable register 1
(SEG1 : address 0FF516)
b7
b0
0 : No pull-up
1 : Pull-up
P10-P13 pull-up
P14-P17 pull-up
P30-P33 pull-up
P34-P37 pull-up
Not used (do not write “1”)
Segment output disable register 2
(SEG2 : address 0FF616)
b7
b0
0 : No pull-up
1 : Pull-up
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