參數(shù)資料
型號(hào): M38C58M8-XXXFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 20 MM, 0.80 MM PITCH, PLASTIC, LQFP-80
文件頁(yè)數(shù): 7/9頁(yè)
文件大?。?/td> 956K
代理商: M38C58M8-XXXFP
Rev.2.00
Nov 23, 2005
page 5 of 73
REJ03B0028-0200
38C5 Group
Apply power source voltage to VCC, and 0 V to VSS.
Reset input pin for active “ L.”
Input and output pins for the main clock generating circuit.
Connect a ceramic resonator or a quartz-crystal oscillator between the XIN and XOUT pins to
set the oscillation frequency. When an external clock is used, connect the clock source to XIN,
and leave XOUT pin open.
Feedback resistor is built in between XIN pin and XOUT pin.
Input 0
≤ VL1 ≤ VL2 ≤ VL3 ≤ VCC voltage.
Input 0 – VL3 voltage to LCD.
LCD common output pins.
COM2 and COM3 are not used at 1/2 duty ratio.
COM3 is not used at 1/3 duty ratio.
LCD common/segment output pins.
8-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each pin to be individually
programmed as either input or output.
Pull-up control is enabled in a bit unit.
8-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each 4-bit pin to be
programmed as either input or output.
Pull-up control is enabled in 4-bit unit.
8-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each pin to be individually
programmed as either input or output.
Pull-up control is enabled in a bit unit.
8-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each 4-bit pin to be
programmed as either input or output.
Pull-up control is enabled in a bit unit.
8-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each 4-bit pin to be
programmed as either input or output.
Pull-up control is enabled in a bit unit.
VCC, VSS
RESET
XIN
VL1, VL2, VL3
COM0
COM3
COM4/SEG35
COM7/SEG32
P00/SEG8
P07/SEG15
P10/SEG16
P17/SEG23
P20/SEG0/(KW4)–
P23/SEG3/(KW7)
P24/SEG4
P27/SEG7
P30/SEG24
P37/SEG31
P40/RxD
P41/TxD
P42/SCLK1
P43/SRDY1
P44/SIN2/(KW0),
P45/SOUT2/(KW1),
P46/SCLK2/(KW2),
P47/SRDY2/(KW3),
Power source
Reset input
Clock input
LCD power
source
Common output
Segment output
I/O port P0
I/O port P1
I/O port P2
I/O port P3
I/O port P4
Function except a port function
PIN DESCRIPTION
Table 1 Pin description (1)
Function
Pin
Name
Serial I/O1 function pins
XOUT
Clock output
Key input interrupt
input pins
Serial I/O2
function pins
Key input interrupt
input pins
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