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參數(shù)資料
| 型號(hào)： | M38C35E5MXXXFP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | ECONOLINE: RTS & RTD - 1kVDC Isolation- Internal SMD Construction- UL94V-0 Package Material- Toroidal Magnetics- Efficiency to 85% |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 49/62頁(yè) |
| 文件大小： | 881K |
| 代理商： | M38C35E5MXXXFP |
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49
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C3 Group
Measurement output pin
100 pF
CMOS output
Measurement output pin
100 pF
N-channel open-drain output
1 k
Note:
When bit 7 of the serial I/O control register 1 (address 0019
16
) is “ 1.”
(N-channel open-drain output mode)
t
wH
(S
CLK
)
t
wL
(S
CLK
)
t
d
(S
CLK
-S
OUT
)
t
V
(S
CLK
-S
OUT
)
t
r
(S
CLK
)
t
f
(S
CLK
)
t
r
(CMOS)
t
f
(CMOS)
t
wH
(S
CLK
)
t
wL
(S
CLK
)
t
d
(S
CLK
-S
OUT
)
t
V
(S
CLK
-S
OUT
)
t
r
(S
CLK
)
t
f
(S
CLK
)
t
r
(CMOS)
t
f
(CMOS)
Limits
Parameter
Min.
t
c
(S
CLK
)/2–30
t
c
(S
CLK
)/2–30
–30
Typ.
10
10
Max.
140
30
30
30
30
Symbol
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Notes 1:
When the P-channel output disable bit (bit 7 of address 0019
16
) is “0.”
2:
The X
OUT
, X
COUT
pins are excluded.
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time
Serial I/O output valid time
Serial I/O clock output rising time
Serial I/O clock output falling time
CMOS output rising time
CMOS output falling time
(Note 1)
(Note 1)
(Note 2)
(Note 2)
Table 20 Switching characteristics 1
(Vcc = 4.0 to 5.5 V, Vss = 0 V, Ta = –20 to 85°C, unless otherwise noted)
Limits
ns
ns
ns
ns
ns
ns
ns
ns
Parameter
Min.
t
C
(S
CLK
)/2–50
t
C
(S
CLK
)/2–50
–30
Typ.
20
20
Max.
350
50
50
50
50
Symbol
Unit
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time
Serial I/O output valid time
Serial I/O clock output rising time
Serial I/O clock output falling time
CMOS output rising time
CMOS output falling time
(Note 1)
(Note 1)
(Note 2)
(Note 2)
Table 21 Switching characteristics 2
(Vcc = 2.5 to 4.0 V, Vss = 0 V, Ta = –20 to 85°C, unless otherwise noted)
Notes 1:
When the P-channel output disable bit (bit 7 of address 0019
16
) is “0.”
2:
The X
OUT
, X
COUT
pins are excluded.
Fig. 45 Circuit for measuring output switching characteristics
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