參數(shù)資料
型號(hào)： M38C29MCA-XXXFP
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP64
封裝： 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64
文件頁(yè)數(shù)： 32/102頁(yè)
文件大小： 1567K
代理商： M38C29MCA-XXXFP
35
38C2 Group (A Version)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
A-D CONVERTER
The 38C2 group has a 10-bit A-D converter. The A-D converter per-
forms successive approximation conversion.
[A-D Conversion Register (ADL, ADH)]
One of these registers is a high-order register, and the other is a low-
order register. The high-order 8 bits of a conversion result is stored in
the A-D conversion register (high-order) (address 001B16), and the
low-order 2 bits of the same result are stored in bit 7 and bit 6 of the
A-D conversion register (low-order) (address 001A16).
During A-D conversion, do not read these registers.
Also, the connection between the resistor ladder and reference volt-
age input pin (VREF) can be controlled by the VREF input switch bit (bit
0 of address 001A16). When “1” is written to this bit, the resistor ladder
is always connected to VREF. When “0” is written to this bit, the resistor
ladder is disconnected from VREF except during the A-D conversion.
[A-D Control Register (ADCON)]
This register controls A-D converter. Bits 2 to 0 are analog input pin
selection bits. Bit 3 is an AD conversion completion bit and “0” during A-
D conversion. This bit is set to “1” upon completion of A-D conversion.
A-D conversion is started by setting “0” in this bit.
[Comparison Voltage Generator]
The comparison voltage generator divides the voltage between AVSS
and VREF, and outputs the divided voltages.
[Channel Selector]
The channel selector selects one of the input ports P47/AN7–P40/
AN0 and inputs it to the comparator.
[Comparator and Control Circuit]
The comparator and control circuit compares an analog input volt-
age with the comparison voltage and store the result in the A-D con-
version register. When an A-D conversion is completed, the control
circuit sets the AD conversion completion bit and the AD conversion
interrupt request bit to “1.”
Note that because the comparator consists of a capacitor coupling,
set the A-D clock frequency to 250 kHz or more during an A-D con-
version.
Also, when the STP instruction is executed during the A-D conver-
sion, the A-D conversion is stopped immediately, the A-D conversion
completion bit is set to “1”, and the interrupt request is generated.
Fig. 31 Block diagram of A-D converter
Fig. 30 Structure of A-D control register
Data bus
AVSS
A-D interrupt request
b7
b0
3
P40/OOUT0/AN0
P41/OOUT1/AN1
P42/AN2
P43/AN3
P44/AN4
P45/AN5
P46/AN6
P47/AN7
A-D control register
Channel
selector
Comparator
A-D control circuit
A-D conversion register (H)
A-D conversion register (L)
(Address 001B 16)
(Address 001A 16)
Resistor ladder
VREF
Analog input pin selection bits
b2 b1 b0
00 0: P40/AN0
00 1: P41/AN1
01 0: P42/AN2
01 1: P43/AN3
10 0: P44/AN4
10 1: P45/AN5
11 0: P46/AN6
11 1: P47/AN7
AD conversion completion bit
0: Conversion in progress
1: Conversion completed
AD conversion clock selection bits
b5 b4
00: XIN/2
01: XIN/4
10: XIN/8
11: XIN/16
10-bit or 8-bit conversion switch bit
0: 10-bit AD
1: 8-bit AD
Booster selection bit
(When A-D conveter is used at VCC =
2.5 V or less, write “1” to this bit.)
0: Booster not used
1: Booster used
A-D control register
(ADCON: address 001916)
b7b0
10-bit reading
(Read address 001B16 before 001A16)
A-D conversion register 1
(Address 001B16)
A-D conversion register 2
(Address 001A16)
8-bit reading
(Read only address 001B16)
(Address 001B16)
b0
b7
b0
b1
* VREF input switch bit
b9 b8 b7 b6 b5 b4 b3 b2
b7
b0
b9 b8 b7 b6 b5 b4 b3 b2
b7
b0
*
(high-order)
(low-order)
Note : The bit 5 to bit 1 of address 001A16 become “0” at reading.
Also, bit 0 is undefined at reading.
1: ON
0: ON only during A-D conversion
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M38C29MC-XXXFP 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38C29MC-XXXHP 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38C29RLFS 功能描述:EMULATOR MCU FOR A-VERSION 38C2 RoHS:否 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 內(nèi)電路編程器、仿真器以及調(diào)試器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 19/Jul/2010 標(biāo)準(zhǔn)包裝:1 系列:* 類(lèi)型:* 適用于相關(guān)產(chǎn)品:* 所含物品:*
M38C29T-64FPD 功能描述:DEV 100-PIN RFS/MCU TO 64-PIN 0. RoHS:否 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 配件 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 標(biāo)準(zhǔn)包裝:1 系列:- 附件類(lèi)型:USB 至 1-Wire? RJ11 適配器 適用于相關(guān)產(chǎn)品:1-Wire? 設(shè)備 產(chǎn)品目錄頁(yè)面:1429 (CN2011-ZH PDF)
M38C29T-64LCA 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:Converter from 100-pin RFS Type Emulator MCU to 64-pin 0.8mm-pitch QFP (for 38C1, 38C2, 38K0 and 38K2 Group of 38000 Series)
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