參數(shù)資料
型號(hào): M38C29MC-XXXFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64
文件頁(yè)數(shù): 17/91頁(yè)
文件大?。?/td> 1867K
代理商: M38C29MC-XXXFP
23
38C2 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
TIMERS
8-Bit Timer
The 38C2 group has four built-in timers : Timer 1, Timer 2, Timer 3,
and Timer 4.
Each timer has the 8-bit timer latch. All timers are down-counters.
When the timer reaches “0016,” the contents of the timer latch is
reloaded into the timer with the next count pulse. In this mode, the
interrupt request bit corresponding to that timer is set to “1.”
The count can be stopped by setting the stop bit of each timer to “1.”
q Frequency Divider For Timer
Timer 1, timer 2, timer 3 and timer 4 have the frequency divider for
the count source. The count source of the frequency divider is switched
to XIN or XCIN by the CPU mode register. The frequency divider is
controlled by the 3-bit register. The division ratio can be selected
from as follows;
1/1, 1/2, 1/16, 1/32, 1/64, 1/128, 1/256, 1/1024 of f(XIN) or f(XCIN).
qTimer 1, Timer 2
The count sources of timer 1 and timer 2 can be selected by setting
the timer 12 mode register.
When f(XCIN) is selected as the count source, counting can be per-
formed regardless of XCIN oscillation. However, when XCIN is stopped,
the external pulse input from XCIN pin is counted. Also, by the timer
12 mode register, each time timer 2 underflows, the signal of which
polarity is inverted can be output from P36/T2OUT pin.
At reset, all bits of the timer 12 mode register are cleared to “0,” timer
1 is set to “FF16,” and timer 2 is set to “0116.”
When executing the STP instruction, previously set the wait time at
return.
q Timer 3, Timer 4
The count sources of timer 3 and timer 4 can be selected by setting
the timer 34 mode register. Also, by the timer 34 mode register, each
time timer 3 or timer 4 underflows, the signal of which polarity is
inverted can be output from P52/T3OUT pin or P53/T4OUT pin.
q Timer 3 PWM0 Mode, Timer 4 PWM1 Mode
A PWM rectangular waveform corresponding to the 10-bit accuracy
can be output from the P52/PWM0 pin and P53/PWM1 pin by set-
ting the timer 34 mode register and PWM01 register (refer to Figure
21).
The “n” is the value set in the timer 3 (address 002216) or the timer
4 (address 002316). The “ts” is one period of timer 3 or timer 4
count source.
One output pulse is the short interval. Four output pulses are the
long interval. “H” width of the short interval is obtained by n ts.
However, in the long interval, “H” width of output pulse is extended
for ts which is set by the PWM01 register (address 002416).
q Writing to Timer 2, Timer 3, Timer 4
When writing to the latch only, if the write timing to the reload latch
and the underflow timing are almost the same, the value is set into
the timer and the timer latch at the same time. In this time, counting
is stopped during writing to the reload latch.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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