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參數(shù)資料
| 型號： | M38C24M6-XXXHP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 47/63頁 |
| 文件大?。?/td> | 1000K |
| 代理商： | M38C24M6-XXXHP |
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47
38C2 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Fig. 49 Internal status at reset
FF
16
FF
16
00
16
002A
16
0
2
B
1
0
2
C
1
0
2
D
1
0
2
E
1
6
6
0
0
3
7
1
6
3
8
1
6
0
3
A
1
6
X: Not fixed
Since the initial values for other than above mentioned registers and
RAM contents are indefinite at reset, they must be set.
A
d
0
0
0
0
d
r
e
s
s
R
e
g
i
s
t
e
r
c
o
n
t
e
n
t
s
A
d
d
r
e
s
s
R
e
g
i
s
t
e
r
c
o
n
t
e
n
t
s
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
FF
16
FF
16
00
16
0
0
1
6
0
1
1
6
0
2
1
6
0
0
0
0
4
1
6
0
5
1
6
0
6
1
6
0
0
0
8
1
6
0
9
1
6
000A
16
0
0
B
1
0
0
C
1
0
0
D
1
6
6
6
0018
16
0
1
9
1
6
001D
16
0
1
F
1
6
0020
16
0
2
1
1
6
0022
16
0
2
3
1
6
0024
16
0025
16
0
2
0
2
8
1
6
C
o
i
o
m
p
a
r
e
r
e
g
i
s
t
e
r
(
l
o
w
-
o
r
d
e
r
)
P
o
o
o
o
r
t
P
0
P
r
t
P
0
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
P
r
t
P
1
P
o
o
o
r
t
P
2
P
r
t
P
2
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
P
r
t
P
3
P
o
o
r
t
P
4
P
r
t
P
4
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
Port P5
o
r
t
o
r
t
o
r
t
P
P
5
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
P
P
6
P
P
6
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
Clock output control register
A-D control register
e
r
i
a
l
I
/
O
1
S
s
t
a
t
u
s
r
e
g
i
s
t
e
r
Timer 2
i
m
e
T
r
3
Timer 4
PWM01 register
i
m
e
r
1
2
T
m
o
d
e
r
e
g
i
s
t
e
r
Timer 34 mode register
C
m
p
a
r
e
r
e
g
i
s
t
e
r
(
h
i
g
h
-
o
r
d
e
r
)
T
m
e
r
X
(
l
o
w
-
o
r
d
e
r
)
Timer X (high-order)
(1)
(2)
(3)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(19)
(20)
(21)
(22)
(23)
(24)
(25)
(26)
(27)
(28)
(29)
00
16
0029
16
T
i
i
m
e
r
X
(
e
x
t
e
n
s
i
o
n
)
(30)
(3
(3
2
)
(33)
(3
(3
(3
(3
(3
5
)
6
)
7
)
8
)
T
m
e
r
Y
(
l
o
w
-
o
r
d
e
r
)
T
i
i
m
e
r
Y
(
h
i
g
h
-
o
r
d
e
r
)
T
m
e
r
X
m
o
d
e
r
e
g
i
s
t
e
r
W
C
C
In
a
t
c
h
d
o
g
t
i
m
e
r
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
L
D
p
o
w
e
r
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
L
D
m
o
d
e
r
e
g
i
s
t
e
r
t
e
r
r
u
p
t
e
d
g
e
s
e
l
e
c
t
i
o
n
r
e
g
i
s
t
e
r
0
1
6
00
16
00
16
0
0
3
B
1
6
3
C
1
6
F
F
F
0
3
F
1
6
0
E
0
1
6
0
E
1
1
6
0
E
3
1
6
0FE4
16
F
F
(3
(4
9
)
0
)
(4
3
)
(44)
(4
(4
5
)
6
)
(47)
(4
CPU mode register
In
t
e
r
r
u
p
t
r
e
q
u
e
s
t
r
e
g
i
s
t
e
r
1
In
t
e
r
r
u
p
t
r
e
q
u
e
s
t
r
e
g
i
s
t
e
r
2
Interrupt control register 1
In
t
e
r
r
u
p
t
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
2
0
1
0
1
0
1
6
6
6
Serial I/O2 status register
i
m
e
r
1
T
1
)
FFFC
16
contents
(PS)
(P
C
H
)
(P
C
L
)
P
r
o
g
r
a
m
c
o
u
n
t
e
r
P
r
o
c
e
s
s
o
r
s
t
a
t
u
s
r
e
g
i
s
t
e
r
F
F
D
1
6
c
o
n
t
e
n
t
s
1
0039
16
08
16
FF
16
01
16
FF
16
FF
16
00
16
00
16
00
16
00
16
0
3
1
6
P
r
t
P
1
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
(4)
0
3
E
1
6
(4
1
)
(4
2
)
0
1
0
1
6
6
0
3
D
1
6
0
1
6
00
16
00
16
0
1
0
1
0
0
1
6
0
F
F
F
F
F
1
1
6
0
F
2
1
6
0
F
3
1
6
8
)
(49)
(50)
(51)
(5
6
6
0
F
4
1
6
0FF5
16
0FF6
16
F
F
F
F
F
F
2
)
(53)
(54)
(5
00
16
0
1
F
1
F
1
F
1
0
1
0
1
6
6
6
0
7
1
6
0
8
1
6
0
9
1
6
5
)
(56)
(5
7
)
6
6
0FFA
16
0FFB
16
F
F
0
E
1
6
(58)
(5
9
)
(60)
6
(61)
(6
2
)
P
o
r
t
P
3
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
0
0
7
1
6
6
1
6
6
6
002F
16
0
3
1 0 0 0 0 0
0
0
1 0 0 0 0 0
0
0
00
16
4
) Timer Y mode register
0
1
6
S
A
e
r
i
a
l
I
/
O
1
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
U
R
T1
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
S
A
e
r
i
a
l
I
/
O
2
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
U
R
T
2
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
O
s
c
i
l
l
a
t
i
o
n
o
u
t
p
u
t
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
PULL register
e
y
i
n
p
K
u
t
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
Timer 1234 mode register
i
m
e
r
X
c
o
n
t
r
T
o
l
r
e
g
i
s
t
e
r
T
i
m
e
r
1
2
f
r
e
q
u
e
n
c
y
d
i
v
i
s
i
o
n
s
e
l
e
c
t
i
o
n
r
e
g
i
s
t
e
r
T
i
m
e
r
3
4
f
r
e
q
u
e
n
c
y
d
i
v
i
s
i
o
n
s
e
l
e
c
t
i
o
n
r
e
g
i
s
t
e
r
Timer XY frequency division selection register
S
e
e
g
m
e
n
t
o
u
t
p
u
t
d
i
s
a
b
l
e
r
e
g
i
s
t
e
r
0
S
g
m
e
n
t
o
u
t
p
u
t
d
i
s
a
b
l
e
r
e
g
i
s
t
e
r
1
Segment output disable register 2
i
m
e
r
Y
m
o
d
e
r
e
g
l
a
s
h
m
e
m
o
r
y
c
o
T
i
s
t
e
r
2
F
n
t
r
o
l
r
e
g
i
s
t
e
r
0 0 1 1 1 1
1
1
0 1 0 0 1 0
0
0
0
1
6
1 1 1 0 0 0
0
0
1 1 1 0 0 0
0
0
1
0
0
0
0
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| M38C29FFAFP | 制造商:Renesas Electronics Corporation 功能描述: |
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