27
38C2 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
(4) Set of Timer X Mode Register
Set the write control bit of the timer X mode register to
“
1
”
(write to
the latch only) when setting the IGBT output and PWM modes.
Output waveform simultaneously reflects the contents of both regis-
ters at the next underflow after writing to the timer X register (high-
order).
(5) Output Control Function of Timer X
When using the output control function (INT
1
and INT
2
) in the IGBT
output mode, set the levels of INT
1
and INT
2
to
“
H
”
in the falling edge
active or to
“
L
”
in the rising edge active before switching to the IGBT
output mode.
(6) Note on Switch of CNTR
0
Active Edge
When the CNTR
0
active edge switch bits are set, at the same time,
the interrupt active edge is also affected.
When the pulse width is measured, set the bit 7 of the CNTR
0
ac-
tive edge switch bits to
“
0
”
.
Timer Y
Timer Y is a 16-bit timer.
The timer Y count source can be selected by setting the timer Y mode
register. When f(X
CIN
) is selected as the count source, counting can
be performed regardless of X
CIN
oscillation. However, when X
CIN
is
stopped, the external pulse input from X
CIN
pin is counted.
Four operating modes can be selected for timer Y by the timer Y
mode register. Also, the real time port can be controlled.
(1) Timer Mode
The timer Y count source can be selected by setting the timer Y mode
register.
(2) Period Measurement Mode
The interrupt request is generated at rising/falling edge of CNTR
1
pin input signal. Simultaneously, the value in timer Y latch is reloaded
in timer Y and timer Y continues counting. Except for that, this mode
operates just as in the timer mode.
The timer value just before the reloading at rising/falling of CNTR
1
pin input is retained until the timer Y is read once after the reload.
The rising/falling timing of CNTR
1
pin input is found by CNTR
1
inter-
rupt. When using this mode, set the port sharing the CNTR
1
pin to
input mode.
(3) Event Counter Mode
The timer counts signals input through the CNTR
1
pin.
Except for that, this mode operates just as in the timer mode.
When using this mode, set the port sharing the CNTR
1
pin to input
mode.
(4) Pulse Width HL Continuously Measurement
Mode
The interrupt request is generated at both rising and falling edges of
CNTR
1
pin input signal. Except for that, this mode operates just as in
the period measurement mode. When using this mode, set the port
sharing the CNTR
1
pin to input mode.
I
Notes on Timer Y
G
CNTR
1
Interrupt Active Edge Selection
CNTR
1
interrupt active edge depends on the CNTR
1
active edge
switch bit. However, in pulse width HL continuously measurement
mode, CNTR
1
interrupt request is generated at both rising and falling
edges of CNTR
1
pin input signal regardless of the setting of CNTR
1
active edge switch bit.
G
Timer Y Read/Write Control
When reading from/writing to timer Y, read from/write to both the
high-order and low-order bytes of timer Y. When the value is read,
read the high-order bytes first and the low-order bytes next. When
the value is written, write the low-order bytes first and the high-
order bytes next.
If reading from the timer Y register during write operation or writing
to it during read operation is performed, normal operation will not
be performed.
When writing a value to the timer Y address to write to the latch
only, the value is set into the reload latch and the timer is updated
at the next underflow. Normally, when writing a value to the timer Y
address, the value is set into the timer and the timer latch at the
same time, because they are set to write at the same time.
When writing to the latch only, if the write timing to the high-order
reload latch and the underflow timing are almost the same, the value
is set into the timer and the timer latch at the same time. In this
time, counting is stopped during writing to the high-order reload
latch.
Do not switch the timer count source during timer count operation.
Stop the timer count before switching it.
G
Real Time Port Control
When the real time port function is valid, data for the real time port is
output from ports P4
7
and P4
6
each time the timer Y underflows.
(However, if the real time port control bit is changed from
“
0
”
to
“
1
”
after the data for real time port is set, data is output independent of
the timer Y operation.) When the data for the real time port is changed
while the real time port function is valid, the changed data is output at
the next underflow of timer Y. Before using this function, set the cor-
responding port direction registers to output mode.