參數(shù)資料
型號(hào): M38C13M6-XXXFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64
文件頁(yè)數(shù): 5/59頁(yè)
文件大?。?/td> 704K
代理商: M38C13M6-XXXFP
Rev.2.40
Jun 14, 2004
page 13 of 56
38C1 Group
I/O PORTS
Direction Registers (Ports P2–P6)
The I/O ports (P2–P6) have direction registers which determine
the input/output direction of each individual pin.
When “0” is written to the bit corresponding to a pin, that pin be-
comes an input pin. When “1” is written to that bit, that pin be-
comes an output pin.
If data is read from a pin set to output, the value of the port output
latch is read, not the value of the pin itself. Pins set to input are
floating. If a pin set to input is written to, only the port output latch
is written to and the pin remains floating.
Port P0
Port P0 is an input port.
P00/SEG0-P07/SEG7 pins are also used as segment output pins.
These pins can be used as segment output pins by setting seg-
ment output enable bits.
Fig. 11 Structure of PULL register
b7b0
PULL register
(PULL: address 003316, initial value: 0716)
P20–P23 pull-down
P24–P27 pull-down
Note
P30–P34 pull-up
P44–P47 pull-up
P50–P53 pull-up
P54–P57 pull-up
P60–P64 pull-up
Note: These ports are invalid when selecting SEG.
P00–P07 pull-down
Pull-up/Pull-down Control
By setting the PULL register (address 003316), I/O ports can con-
trol pull-up/pull-down (pins also used as segment output pin: pull-
down, other pins: pull-up). Pull-up/pull-down of pins are performed
by setting the PULL register to “1”.
However, the contents of PULL register does not affect ports pro-
grammed as the output ports.
Input port P0 and I/O port P2 are pulled-down in the initial state.
Also, the pull-down setting is invalid for pins set to segment output
with the segment output enable register (address 003816).
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