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| 型號(hào)： | M38B59MFH-A126FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 34/69頁(yè) |
| 文件大?。?/td> | 1011K |
| 代理商： | M38B59MFH-A126FP |
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MITSUBISHI MICROCOMPUTERS
38B5 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
34
PRELIMINARY
Notice: This s not a final specification.
Some parametric imits are subject to change.
(2) Asynchronous Serial I/O (UART) Mode
The asynchronous serial I/O (UART) mode can be selected by clear-
ing the serial I/O2 mode selection bit (b6) of the serial I/O2 control
register (address 001D
16
) to “0.” Eight serial data transfer formats
can be selected and the transfer formats used by the transmitter
and receiver must be identical.
The transmit and receive shift registers each have a buffer (the two
buffers have the same address in memory). Since the shift register
cannot be written to or read from directly, transmit data is written to
the transmit buffer, and receive data is read from the receive buffer.
The transmit buffer can also hold the next data to be transmitted,
and the receive buffer can receive 2-byte data continuously.
Fig. 37 Operation of UART Serial I/O2 Function
Fig. 36 Block Diagram of UART Serial I/O2
TSC=0
TBE=1
RBF=0
TBE=0
TBE=0
RBF=1
RBF=1
ST
D
0
D
1
SP
D
0
D
1
ST
SP
TBE=1
TSC=1*
ST
D
0
D
1
SP
D
0
D
1
ST
SP
Transmit or receive clock
* Generated at 2nd bit in 2-stop
bit mode
1 start bit
7 or 8 data bit
1 or 0 parity bit
1 or 2 stop bit
Serial I/O2 input R
X
D
Write-in signal to
transmit buffer register
Serial I/O2 output T
X
D
Read-out signal from receive
buffer register
OE
PE FE
1/16
1/16
Transmit buffer register
Address
001F
16
Clock control circuit
P5
6
/S
CLK21
P5
4
/R
X
D
P5
5
/T
X
D
P5
7
/S
RDY2
/S
CLK22
X
IN
“0”
“1”
1/4
“0”
“1”
1/2
X
CIN
“1”
Data bus
Receive buffer register
Address 001F
16
Receive shift register
Receive buffer full flag (RBF)
Receive interrupt request (RI)
Baud rate generator
Division ratio 1/(n+1)
Address 0016
16
ST/SP/PA generator
Data bus
Transmit shift register
Transmit shift register shift
completion flag (TSC)
Transmit buffer empty flag (TBE)
Address
001E
16
Transmit interrupt request (TI)
ST detector
UART control register
Address 0017
16
Character length selection bit
Address 001D
16
BRG count source
selection bit
Transmit interrupt source selection bit
Serial I/O2 synchronous
clock selection bit
Character length selection bit
7 bit
8 bit
Serial I/O2 control register
Serial I/O2 status register
SP detector
Serial I/O2 clock I/O pin
selection bit
Internal system clock selection bit
BRG clock
switch bit
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