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| 型號： | M38B57MCH-P218FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 50/69頁 |
| 文件大小： | 1011K |
| 代理商： | M38B57MCH-P218FP |
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MITSUBISHI MICROCOMPUTERS
38B5 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
50
PRELIMINARY
Notice: This s not a final specification.
Some parametric imits are subject to change.
Fig. 56 14-bit PWM Timing
Fig. 55 Structure of PWM Control Register
P8
7
/PWM output selection bit
0: I/O port
1: PWM output
Not used (return “0” when read)
PWM control register
(PWMCON: address 0026
16
)
b7
b0
6A
6A
6A
6A
6A
6B
6A
6A
6A
6A
6A
6A
6A
6A
6B
6B
6B
6B
6B
6B
6B
6B
6B
6B
6B
6B
6B
5
5
5
5
5
5
5
5
5
5
5
5
5
5
6A
6A
6B
6B
6B
6A
6B
6B
6B
6A
6B
6B
6B
6A
6A
6A
6A
6A
6A
6A
6A
6A
6A
6A
6A
6A
6A
4
3
4
4
3
4
4
3
4
6B
6A
69
68
67
02
01
6A
69
68
67
02
01
02
01
00
FF
FE
FD
97
96
95
02
01
00
FC
FF
FE
FD
97
96
95
FC
ADD
ADD
1653
16
1A93
16
1AA4
16
1AA4
16
1EE4
16
1EF5
16
T = 4096
μ
s
(64 64
μ
s)
t = 64
μ
s
13
16
A4
16
24
16
35
16
7B
16
6A
16
59
16
Data 35
16
stored at address 0015
16
t = 64
μ
s
(256 0.25
μ
s)
τ
= 0.25
μ
s
“H” period length specified by PWMH
1
2
B5
16
2
PWM register
PWM register
PWM latch
Data 6A
16
stored at address 0014
16
Data 24
16
stored at address 0015
16
Bit 7 cleared after transfer
Transfer from register to latch
Data 7B
16
stored at address 0014
16
Transfer from register to latch
When bit 7 of PWML is “0,” transfer
PWM output
(Example 1)
Low-order 6-bits
16
16
............36 times
6B
16
............28 times
6A
PWM output
(Example 2)
Low-order 6 bits
16
6B
16
............24 times
6A
16
............40 times
PWM output
8-bit counter
The ADD portions with
additional
are determined
either “H” or “L” by6-bit data.
Minimum bit width
106
64
+
24
256 (64
μ
s), fixed
106
64
+
36
………
………
………
………
………
.............
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