參數(shù)資料
型號: M38B52E4XXXFS
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機
文件頁數(shù): 10/70頁
文件大?。?/td> 864K
代理商: M38B52E4XXXFS
MITSUBISHI MICROCOMPUTERS
38B5 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
17
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
Vector Addresses (Note 1)
Interrupt Request
Interrupt Source Priority
Remarks
High
Low
Generating Conditions
Reset (Note 2)
1
FFFD16
FFFC16
At reset
Non-maskable
INT0
2
FFFB16
FFFA16
At detection of either rising or falling edge of
External interrupt
INT0 input
(active edge selectable)
INT1
3
FFF916
FFF816
At detection of either rising or falling edge of
External interrupt
INT1 input
(active edge selectable)
INT2
4
FFF716
FFF616
At detection of either rising or falling edge of
External interrupt
INT2 input
(active edge selectable)
Remort control/
At 8-bit counter overflow
Valid when interrupt interval
counter overflow
determination is operating
Serial I/O1
5
FFF516
FFF416
At completion of data transfer
Valid when serial I/O1 ordinary
mode is selected
Serial I/O1 auto-
At completion of the last data transfer
Valid when serial I/O1 automatic
matic transfer
transfer mode is selected
Timer X
6
FFF316
FFF216
At timer X underflow
Timer 1
7
FFF116
FFF016
At timer 1 underflow
Timer 2
8
FFEF16
FFEE16
At timer 2 underflow
STP release timer underflow
Timer 3
9
FFED16
FFEC16
At timer 3 underflow
Timer 4
10
FFEB16
FFEA16
At timer 4 underflow
Timer 5
11
FFE916
FFE816
At timer 5 underflow
Timer 6
12
FFE716
FFE616
At timer 6 underflow
Serial I/O2 receive
13
FFE516
FFE416
At completion of serial I/O2 data receive
INT3
14
FFE316
FFE216
At detection of either rising or falling edge of
External interrupt
INT3 input
(active edge selectable)
Serial I/O2 transmit
At completion of data transmit
INT4
15
FFE116
FFE016
At detection of either rising or falling edge of
External interrupt
INT4 input
(active edge selectable)
Valid when INT4 interrupt is selected
A-D conversion
At completion of A-D conversion
Valid when A-D conversion is selected
FLD blanking
16
FFDF16
FFDE16
At falling edge of the last timing immediately
Valid when FLD blanking
before blanking period starts
interrupt is selected
FLD digit
At rising edge of each digit
Valid when FLD digit interrupt is selected
BRK instruction
17
FFDD16
FFDC16
At BRK instruction execution
Non-maskable software interrupt
Table 6 Interrupt Vector Addresses and Priority
Notes 1 : Vector addresses contain interrupt jump destination addresses.
2 : Reset function in the same way as an interrupt with the highest priority.
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