參數(shù)資料
型號(hào): M38B48E9H-XXXXFP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁數(shù): 42/78頁
文件大?。?/td> 1214K
代理商: M38B48E9H-XXXXFP
42
38B4 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Fig. 44 Segment/Digit setting example
FLD Automatic Display Pins
When the automatic display control bits of the FLDC mode register
(address 0EF4
16
) are set to “1,” the ports of P0, P1, P2, P3 and P8
are used as FLD automatic display pins.
When using the FLD automatic display mode, set each port to the
FLD pin or the general-purpose port using the respective switch reg-
ister in accordance with the number of segments and the number of
digits.
This setting is performed by writing a value into the FLD/port switch
register (addresses 0EF9
16
to 0EFB
16
) of each port.
This setting can be performed in units of bit. When “0” is set, the port
is set to the general-purpose port. When “1” is set, the port is set to
the FLD pin. There is no restriction on whether the FLD pin is to be
used as a segment pin or a digit pin.
Table 9 Pins in FLD automatic display mode
Port Name
Automatic Display Pins
Setting Method
P0, P2,
P8
0
–P8
3
P1, P3
P8
4
–P8
7
FLD
0
–FLD
15
FLD
32
–FLD
35
FLD
16
–FLD
31
FLD
36
–FLD
39
The individual bits of the FLD/port switch register (addresses 0EF9
16
–0EFB
16
) can be set each pin
either FLD port (“1”) or general-purpose port (“0”).
None (FLD only)
The individual bits of the FLD/port switch register (address 0EFB
16
) can be set each pin to either
FLD port (“1”) or general-purpose port (“0”).
The output can be reversed by the port P8 FLD output control register (address 0EFC
16
).
The port output format is the CMOS output format. When using the port as a display pin, a driver
must be installed externally.
1
8
5
P
P
P
P
L
P
P
P
2
4
2
5
2
6
2
7
0
1
0
2
0
3
P
P
P
P
2
0
2
1
2
2
2
3
0
0
0
0
0
0
0
0
F
F
F
F
F
F
F
F
L
F
F
F
F
F
F
F
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
D
1
D
1
D
1
D
1
D
2
D
2
D
2
D
2
6
(
7
(
8
(
9
(
0
(
1
(
2
(
3
(
D
D
D
D
S
S
S
S
I
I
I
I
E
E
E
E
G
1
)
G
2
)
G
3
)
G
4
)
G
4
)
G
5
)
G
6
)
G
7
)
P
P
F
F
0
4
0
5
L
L
D
1
D
1
4
(
5
(
S
S
E
E
G
2
)
G
3
)
F
D
8
(
S
E
G
1
)
1
0
0
0
0
0
1
1
F
F
F
F
P
P
P
P
L
L
L
L
8
4
8
5
8
6
8
7
D
3
D
3
D
3
D
3
2
(
3
(
4
(
5
(
S
S
S
S
E
E
E
E
G
1
G
1
G
1
G
1
2
)
3
)
4
)
5
)
F
D
2
D
2
D
2
D
2
D
2
D
2
D
3
D
3
4
(
5
(
6
(
7
(
8
(
9
(
0
(
1
(
S
S
S
S
D
D
D
D
E
E
E
E
I
I
I
I
G
8
)
G
9
)
G
1
G
1
G
5
)
G
6
)
G
7
)
G
8
)
0
)
1
)
1
1
1
1
0
0
0
0
2
1
5
5
D
0
(
D
1
(
D
2
(
D
3
(
D
4
(
D
5
(
D
6
(
D
7
(
F
F
F
F
F
F
F
F
L
F
F
F
F
F
F
F
L
F
F
F
F
F
F
F
L
F
F
F
F
F
F
F
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
D
8
(
D
9
(
D
1
D
1
D
1
D
1
D
1
D
1
S
S
0
(
1
(
2
(
3
(
4
(
5
(
E
E
S
S
S
S
S
S
G
9
)
G
1
E
G
1
E
G
1
E
G
1
E
G
1
E
G
1
E
G
1
0
)
1
)
2
)
3
)
4
)
5
)
6
)
1
1
1
1
1
1
1
1
F
F
F
F
F
F
F
F
L
L
L
L
L
L
L
L
S
S
S
S
S
S
S
S
E
E
E
E
E
E
E
E
G
1
)
G
2
)
G
3
)
G
4
)
G
5
)
G
6
)
G
7
)
G
8
)
F
D
1
D
1
D
1
D
1
D
2
D
2
D
2
D
2
6
(
7
(
8
(
9
(
0
(
1
(
2
(
3
(
D
D
D
D
D
D
D
D
I
I
I
I
I
I
I
I
G
1
)
G
2
)
G
3
)
G
4
)
G
5
)
G
6
)
G
7
)
G
8
)
1
1
1
1
1
1
1
1
F
D
2
D
2
D
2
D
2
D
2
D
2
D
3
D
3
4
(
5
(
6
(
7
(
8
(
9
(
0
(
1
(
D
D
D
D
D
D
D
S
I
I
I
I
I
I
I
E
G
9
)
G
1
G
1
G
1
G
1
G
1
G
1
G
1
0
)
1
)
2
)
3
)
4
)
5
)
7
)
F
D
3
D
3
D
3
D
3
D
3
D
3
D
3
D
3
2
(
3
(
4
(
5
(
6
(
7
(
8
(
9
(
S
S
S
S
S
S
S
S
E
E
E
E
E
E
E
E
G
1
G
1
G
2
G
2
G
2
G
2
G
2
G
2
8
)
9
)
0
)
1
)
2
)
3
)
4
)
5
)
1
1
1
1
1
1
1
1
1
2
8
0
F
F
F
F
F
F
F
F
L
F
F
F
F
F
F
F
L
F
F
F
F
F
F
F
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
D
8
(
D
9
(
D
1
D
1
D
1
D
1
D
1
D
1
D
D
0
(
1
(
2
(
3
(
4
(
5
(
I
I
G
1
)
G
2
)
D
I
G
3
)
D
I
G
4
)
D
I
G
5
)
D
I
G
6
)
D
I
G
7
)
D
I
G
8
)
1
1
1
1
1
1
F
F
F
F
F
F
L
L
L
L
L
L
D
2
(
D
3
(
D
4
(
D
5
(
D
6
(
D
7
(
S
S
S
S
S
S
E
E
E
E
E
E
G
1
)
G
2
)
G
3
)
G
4
)
G
5
)
G
6
)
F
D
1
D
1
D
1
D
1
D
2
D
2
D
2
D
2
6
(
7
(
8
(
9
(
0
(
1
(
2
(
3
(
D
D
D
D
D
D
D
D
I
I
I
I
I
I
I
I
G
9
)
G
1
G
1
G
1
G
1
G
1
G
1
G
1
0
)
1
)
2
)
3
)
4
)
5
)
6
)
1
1
1
1
1
1
1
1
F
D
2
D
2
D
2
D
2
D
2
D
2
D
3
D
3
4
(
5
(
6
(
7
(
8
(
9
(
0
(
1
(
D
D
D
D
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S
S
S
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I
I
E
E
E
E
G
1
G
1
G
1
G
2
G
7
)
G
8
)
G
9
)
G
1
7
)
8
)
9
)
0
)
F
F
F
F
F
F
F
F
L
L
L
L
L
L
L
L
D
3
D
3
D
3
D
3
D
3
D
3
D
3
D
3
2
(
3
(
4
(
5
(
6
(
7
(
8
(
9
(
S
S
S
S
S
S
S
S
E
E
E
E
E
E
E
E
G
1
G
1
G
1
G
1
G
1
G
1
G
1
G
1
1
)
2
)
3
)
4
)
5
)
6
)
7
)
8
)
1
1
1
1
1
1
1
1
1
1
6
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
P
P
P
P
P
P
2
0
2
1
2
2
2
3
2
4
2
5
F
F
L
F
F
F
F
F
F
F
L
F
F
F
F
F
F
F
L
F
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
D
4
(
D
5
(
S
S
E
E
G
1
)
G
2
)
F
D
6
(
D
7
(
D
8
(
D
9
(
D
1
D
1
D
1
D
1
S
S
S
S
0
(
1
(
2
(
3
(
E
E
E
E
S
S
S
S
G
3
)
G
4
)
G
5
)
G
6
)
E
G
7
)
E
G
8
)
E
G
9
)
E
G
1
0
)
F
F
F
F
F
F
8
0
L
L
L
L
L
L
D
1
D
1
D
2
D
2
D
2
D
2
4
(
5
(
6
(
7
(
8
(
9
(
S
S
S
S
S
S
E
E
E
E
E
E
G
1
G
1
G
1
G
1
G
1
G
1
1
)
2
)
3
)
4
)
5
)
6
)
F
D
1
D
1
D
1
D
1
D
2
D
2
D
2
D
2
6
(
7
(
8
(
9
(
0
(
1
(
2
(
3
(
D
D
D
D
D
D
D
D
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G
1
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G
2
)
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3
)
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4
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5
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G
6
)
G
7
)
G
8
)
F
D
2
D
2
4
(
5
(
D
D
I
I
G
9
)
G
1
0
)
P
P
P
P
P
P
P
8
1
8
2
8
3
8
4
8
5
8
6
8
7
P
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
P
P
2
0
2
1
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1
1
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1
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