
30
38B4 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
G
Serial I/O1 operation
Either the internal synchronous clock or external synchronous clock
can be selected by the serial I/O1 synchronous clock selection bits
(b2 and b3 of address 0019
16
) of serial I/O1 control register 1 as
synchronous clock for serial transfer.
The internal synchronous clock has a built-in dedicated divider where
7 different clocks are selected by the internal synchronous clock
selection bits (b5, b6 and b7 of address 001C
16
) of serial I/O1
control register 3.
The P6
2
/S
RDY1
/AN
8
, P6
4
/INT
4
/S
BUSY1
/AN
10,
and P6
5
/S
STB1
/AN
11
pins each select either I/O port or handshake I/O signal by the
serial I/O1 synchronous clock selection bits (b2 and b3 of address
0019
16
) of serial I/O1 control register 1 as well as the P6
2
/S
RDY1
P6
4
/S
BUSY1
pin control bits (b0 to b3 of address 001A
16
) of serial
I/O1 control register 2.
For the S
OUT1
being used as an output pin, either CMOS output or
N-channel open-drain output is selected by the P5
1
/S
OUT1
P-channel output disable bit (b7 of address 001A
16
) of serial I/O1
control register 2.
Either output active or high-impedance can be selected as a S
OUT1
pin state at serial non-transfer by the S
OUT1
pin control bit (b6 of
address 001A
16
) of serial I/O1 control register 2. However, when
the external synchronous clock is selected, perform the following
setup to put the S
OUT1
pin into a high-impedance state.
When the S
CLK1
input is “H” after completion of transfer, set the
S
OUT1
pin control bit to “1”.
When the S
CLK1
input goes to “L” after the start of the next serial
transfer, the S
OUT1
put into an output active state.
Regardless of whether the internal synchronous clock or external
synchronous clock is selected, the full duplex mode and the trans-
mit-only mode are available for serial transfer, one of which is se-
lected by the transfer mode selection bit (b5 of address 0019
16
) of
serial I/O1 control register 1.
Either LSB first or MSB first is selected for the I/O sequence of the
serial transfer bit strings by the transfer direction selection bit (b6 of
address 0019
16
) of serial I/O1 control register 1.
When using serial I/O1, first select either 8-bit serial I/O or auto-
matic transfer serial I/O by the serial transfer selection bits (b0 and
b1 of address 0019
16
) of serial I/O1 control register 1, after comple-
tion of the above bit setup. Next, set the serial I/O initialization bit
(b4 of address 0019
16
) of serial I/O1 control register 1 to “1” (Serial
I/O enable) .
When stopping serial transfer while data is being transferred, re-
gardless of whether the internal or external synchronous clock is
selected, reset the serial I/O initialization bit (b4) to “0”.
Fig. 24 Structure of serial I/O1 control register 3
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b
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