參數(shù)資料
型號(hào)： M38B42E5H-XXXXFP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 14/78頁(yè)
文件大小： 1214K
代理商： M38B42E5H-XXXXFP
14
38B4 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Table 6 List of I/O port functions (1)
zPin
Name
Input/Output
I/O Format
Non-Port Function
Related SFRs
Ref.No.
P0
0
/FLD
8
–
P0
7
/FLD
15
Port P0
Input/output,
individual bits
CMOS compatible input level FLD automatic display function FLDC mode register
High-breakdown voltage P-
channel open-drain output
with pull-down resistor
High-breakdown voltage P-
channel open-drain output
with pull-down resistor
Low-voltage input level
Buzzer output (P2
0
)
High-breakdown voltage P-
FLD automatic display function
channel open-drain output
FLD automatic display function
Buzzer output control register
(1)
Port P0FLD/port switch register
P1
0
/FLD
16
– Port P1
P1
7
/FLD
23
Output
FLDC mode register
(2)
P2
0
/B
UZ02
/
FLD
0
P2
1
/FLD
1
–
P2
7
/FLD
7
P3
0
/FLD
24
– Port P3
P3
7
/FLD
31
Port P2
Input/output,
individual bits
FLDC mode register
Port P2FLD/port switch register
(3)
(1)
Output
High-breakdown voltage P-
channel open-drain output
with pull-down resistor
CMOS compatible input level External interrupt input
N-channel open-drain output In the mask option type P, INT
3
cannot be used.
Buzzer output
PWM output
Timer output
Timer output
CMOS compatible input level External interrput input
FLDC mode register
(2)
P4
0
/INT
0
,
P4
1
/INT
1
P4
2
/INT
3
P4
3
/B
UZ01
P4
4
/PWM
1
P4
5
/T
1OUT
P4
6
/T
3OUT
P4
7
/INT
2
Port P4
Input/output,
individual bits
Interrupt edge selection register
(5)
Buzzer output control register
Timer 56 mode register
Timer 12 mode register
Timer 34 mode register
I
nterrupt edge selection register
Interrupt interval determination
control register
Serial I/O1 control register 1, 2
(4)
(6)
(8-1)
(8-2)
(9)
Input
P5
0
/S
IN1
P5
1
/S
OUT1
,
P5
2
/S
CLK11
,
P5
3
/S
CLK12
P5
4
/R
X
D
P5
5
/T
X
D,
P5
6
/S
CLK21
P5
7
/S
RDY2
/
S
CLK22
P6
0
/CNTR
1
Port P6
Port P5
Input/output,
individual bits
CMOS compatible input level Serial I/O1 function I/O
CMOS 3-state output
(10)
(11)
Serial I/O2 function I/O
Serial I/O2 control register
UART control register
(10)
(11)
(12)
CMOS compatible input level External count input
N-channel open-drain output In the mask option type P,
CMOS compatible input level CNTR
1
cannot be used.
CMOS 3-state output
Interrupt edge selection register
(7-1)
(7-2)
(13)
P6
1
/CNTR
0
/
CNTR
2
P6
2
/S
RDY1
/
AN
8
P6
3
/AN
9
Serial I/O1 function I/O
A-D conversion input
A-D conversion input
Dimmer signal output
Serial I/O1 function I/O
A-D conversion input
External interrupt input
Serial I/O1 function I/O
A-D conversion input
A-D conversion input
Serial I/O1 control register 1, 2
A-D control register
A-D control register
P8FLD output control bit
Serial I/O1 control register 1, 2
A-D control register
Interrupt edge selection register
Serial I/O1 control register 1, 2
A-D control register
A-D control register
(14)
(15)
P6
4
/INT
4
/
S
BUSY1
/
AN
10
(16)
P6
5
/S
STB1
/
AN
11
P7
0
/AN
0
–
P7
7
/AN
7
(17)
Port P7
(15)
(7-
1) (7-2)
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