參數(shù)資料
型號(hào)： M38827G5-XXXHP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁(yè)數(shù)： 38/62頁(yè)
文件大?。?/td> 606K
代理商： M38827G5-XXXHP
Rev.1.01
Nov 14, 2005
page 43 of 60
REJ03B0089-0101
3882 Group
Operation Mode
Figure 35 shows the timing of continuous mode; Figure 36 shows
that of Quiet mode.
(1) Continuous mode
Serialized IRQ cycles starts in Continuous mode after CPU reset
in the case of LRESET = “L” and the previous stop frame being 3
clocks.
Fig. 35 Timing diagram of Continuous mode
Fig. 36 Timing diagram of Quiet mode
(2) Quiet mode
At clock stop, clock slow down or the pulse width of the last stop
frame being 2 clocks, it is the Quiet mode.
In this mode the 3882 drives the SERIRQ line to “L” in the 1st
clock. After that the host drives the rest start frame (Note). The
IRQ1 frame, IRQ12 frame or IRQx frame is asserted.
After receiving the start frame; the IRQ1 Frame, IRQ12 Frame or
IRQx frame is asserted.
Note : If the pulse width of “L” is less than 4 clocks, or 9 clocks or
more; the start frame is not detected and the next start (the
falling edge of SERIRQ) is waited.
Note: When the sum of pulse width of “L” driven by the 3882 in
the 1st clock and driven by the host in the rest clocks is
within 4 to 8-clock cycles, the start frame is detected.
If the sum of pulse width of “L” is less than 4 clocks, or 9
clocks or more; the start frame is not detected and the next
start (the falling edge of SERIRQ) is waited.
Start frame (Note)
IRQ0 frame
IRQ1 frame
Host
3882
LCLK
SERIRQ line
Drive source
IRQ2 frame
IRQ3 frame
Host SERIRQ output
3883 SERIRQ output
Note: The start frame count is 4 clocks as exemple.
Start frame (Note)
IRQ0 frame
IRQ1 frame
Host
3882
LCLK
SERIRQ line
Drive source
IRQ2 frame
IRQ3 frame
Host SERIRQ output
3883 SERIRQ output
3882
Note: The start frame count is 4 clocks as exemple
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