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參數(shù)資料
| 型號： | M38503M4H-XXXSP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 53/86頁 |
| 文件大?。?/td> | 1193K |
| 代理商： | M38503M4H-XXXSP |
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53
3850 Group (Spec. H)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Status Register
The status register indicates status such as whether an erase opera-
tion or a program ended successfully or in error. It can be read under
the following conditions.
(1) In the read array mode when the read status register command
(70
16
) is written and the block address is subsequently read.
(2) In the period from when the program write or auto erase starts to
when the read array command (FF
16
)
The status register is cleared in the following situations.
(1) By writing the clear status register command (50
16
)
(2) In the deep power down mode
(3) In the power supply off state
Table 15 gives the definition of each status register bit. When power
is turned on or returning from the deep power down mode, the status
register outputs
“
80
16
”
.
Sequencer status (SR7)
The sequencer status indicates the operating status of the flash
memory. When power is turned on or returning from the deep power
down mode,
“
1
”
is set for it. This bit is
“
0
”
(busy) during the write or
erase operations and becomes
“
1
”
when these operations ends.
Erase Status (SR5)
The erase status reports the operating status of the erase operation.
If an erase error occurs, it is set to
“
1
”
. When the erase status is
cleared, it is set to
“
0
”
.
Program Status (SR4)
The program status reports the operating status of the write opera-
tion. If a write error occurs, it is set to
“
1
”
. When the program status is
cleared, it is set to
“
0
”
.
If
“
1
”
is written for any of the SR5, SR4 bits, the program erase all
blocks, block erase, commands are not accepted. Before executing
these commands, execute the clear status register command (50
16
)
and clear the status register.
Also, any commands are not correct, both SR5 and SR4 are set to
“
1
”
.
Full Status Check
Results from executed erase and program operations can be known
by running a full status check. Figure 55 shows a flowchart of the full
status check and explains how to remedy errors which occur.
Ready/Busy (RY/BY) pin
The RY/BY pin is an output pin (N-chanel open drain output) which,
like the sequencer status (SR7), indicates the operating status of the
flash memory. It is
“
L
”
level during auto program or auto erase opera-
tions and becomes to the high impedance state (ready state) when
these operations end. The RY/BY pin requires an external pull-up.
Table 15 Status register
Each bit of
SRD0 bits
SR7 (D
7
)
SR6 (D
6
)
SR5 (D
5
)
SR4 (D
4
)
SR3 (D
3
)
SR2 (D
2
)
SR1 (D
1
)
SR0 (D
0
)
Sequencer status
Reserved
Erase status
Program status
Reserved
Reserved
Reserved
Reserved
“
1
”
Ready
-
Ended in error
Ended in error
-
-
-
-
Status name
“
0
”
Busy
-
Ended successfully
Ended successfully
-
-
-
-
Definition
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