參數(shù)資料
型號: M38503E4-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDIP42
封裝: 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-42
文件頁數(shù): 52/55頁
文件大?。?/td> 867K
代理商: M38503E4-XXXSP
3
3850 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
VCC, VSS
PIN DESCRIPTION
Functions
Name
Pin
Apply voltage of 2.7 V – 5.5 V to Vcc, and 0 V to Vss.
This pin controls the operation mode of the chip.
Normally connected to VSS.
Reset input pin for active “L.”
Input and output pins for the clock generating circuit.
Connect a ceramic resonator or quartz-crystal oscillator between the XIN and XOUT pins to set
the oscillation frequency.
When an external clock is used, connect the clock source to the XIN pin and leave the XOUT
pin open.
8-bit CMOS I/O port.
I/O direction register allows each pin to be individually programmed as either input or output.
CMOS compatible input level.
CMOS 3-state output structure.
P13 to P17 (5 bits) are enabled to output large current for LED drive.
8-bit CMOS I/O port.
Power source
Table 1 Pin description
Function except a port function
Sub-clock generating circuit I/O
pins (connect a resonator)
Clock input
Clock output
I/O port P0
I/O port P1
I/O port P2
CNVSS input
CNVSS
RESET
Reset input
XIN
XOUT
P00–P07
P10–P17
P20/XCOUT
P21/XCIN
P22
P23
P24/RxD
P25/TxD
P26/SCLK
P27/CNTR0/
SRDY
P30/AN0
P34/AN4
I/O port P3
I/O port P4
I/O direction register allows each pin to be individually
programmed as either input or output.
CMOS compatible input level.
P20, P21, P24 to P27: CMOS3-state output structure.
P22, P23: N-channel open-drain structure.
Serial I/O function pin
Serial I/O function pin/
Timer X function pin
A-D converter input pin
Timer Y function pin
Interrupt input pins
Interrupt input pin
PWM output pin
P40/CNTR1
P41/INT0
P43/INT2
P44/INT3/PWM
8-bit CMOS I/O port with the same function as port P0.
CMOS compatible input level.
CMOS 3-state output structure.
8-bit CMOS I/O port with the same function as port P0.
CMOS compatible input level.
CMOS 3-state output structure.
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