參數(shù)資料
型號(hào)： M38279EFFS
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, UVPROM, 4 MHz, MICROCONTROLLER, CQCC100
封裝： WINDOWED, CERAMIC, LCC-100
文件頁(yè)數(shù)： 22/70頁(yè)
文件大小： 1112K
代理商： M38279EFFS
29
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3827 Group
Serial I/O2
The serial I/O2 function can be used only for clock synchronous
serial I/O.
For clock synchronous serial I/O2 the transmitter and the receiver
must use the same clock. When the internal clock is used, transfer
is started by a write signal to the serial I/O2 register.
When an internal clock is selected as the synchronous clock of the
serial I/O2, either P62 or P63 can be selected as an output pin of
the synchronous clock. In this case, the pin that is not selected as
an output pin of the synchronous clock functions as a port.
[Serial I/O2 Control Register (SIO2CON)]
001D16
The serial I/O2 control register contains 8 bits which control vari-
ous serial I/O2 functions.
Fig. 26 Structure of serial I/O2 control register
Serial I/O2 control register
(SIO2CON : address 001D16)
b7
Internal synchronous clock select bits
0 0 0: f(XIN)/8 (f(XCIN)/8 in low-speed mode)
0 0 1: f(XIN)/16 (f(XCIN)/16 in low-speed mode)
0 1 0: f(XIN)/32 (f(XCIN)/32 in low-speed mode)
0 1 1: f(XIN)/64 (f(XCIN)/64 in low-speed mode)
1 0 0:
1 0 1:
1 1 0: f(XIN)/128 (f(XCIN)/128 in low-speed mode)
1 1 1: f(XIN)/256 (f(XCIN)/256 in low-speed mode)
Serial I/O2 port selection bit
0: I/O port
1: SOUT2,SCLK21/SCLK22 signal output
P61/SOUT2 P-channel output disable bit
0: CMOS output (in output mode)
1: N-channel open-drain output
(in output mode)
Transfer direction selection bit
0: LSB first
1: MSB first
Synchronous clock selection bit
0: External clock
1: Internal clock
Synchronous clock output pin selection bit
0: SCLK21
1: SCLK22
b0
b2 b1 b0
Do not set
Fig. 27 Block diagram of serial I/O2 function
f(XIN)
“1”
“0”
“1”
“0”
“1”
S
CLK2
(Note)
1/8
1/16
1/32
1/64
1/128
1/256
Data bus
Serial I/O2
interrupt request
Serial I/O2 port selection bit
Serial I/O counter 2 (3)
Serial I/O shift register 2 (8)
Synchronous circuit
Synchronous clock
selection bit
External clock
Internal synchronous
clock select bits
Divider
P63 latch
P63/SCLK22
P62/SCLK21
P61/SOUT2
P60/SIN2
P62 latch
P61 latch
(Note)
Note: It is selected by the synchronous clock selection bit, the synchronous
clock output pin selection bit, and the serial I/O port selection bit.
(f(XCIN) in low-speed mode)
相關(guān)PDF資料
PDF描述
M38503E4SP 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDIP42
M38503E4FP 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDSO42
M38503M6-XXXFP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO42
M38503E6SP 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDIP42
M38504E6FP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO42
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M3828 BK001 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 1000'
M3828 BK002 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 500'
M3828 BK005 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 100'
M3828 BK199 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 3000=3000'
M3829 BK001 制造商:Alpha Wire Company 功能描述:CBL 4COND 16AWG BLK 1000'
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*