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參數(shù)資料
| 型號(hào)： | M38275M1MXXXHP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Quad Low-Power Rail-to-Rail Input/Output Op Amp 14-SOIC 0 to 70 |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 32/70頁(yè) |
| 文件大?。?/td> | 1112K |
| 代理商： | M38275M1MXXXHP |
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32
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3827 Group
MITSUBISHI MICROCOMPUTERS
Fig. 32 PWM output timing when PWM register or PWM prescaler is changed
Fig. 31 Structure of PWM control register
b7
b0
PWM control register
(PWMCON : address 002B
16
)
Count source selection bit
0: f(X
IN
)
1: f(X
IN
)/2
PWM
0
function enable bit
0: PWM
0
disabled
1: PWM
0
enabled
PWM
1
function enable bit
0: PWM
1
disabled
1: PWM
1
enabled
Not used (return “0” when read)
T
T2
C
B
T
PWM register
write signal
PWM prescaler
write signal
(Changes from “A” to “B” during “H” period)
(Changes from “T” to “T2” during PWM period)
PWM
(internal)
A
B
T
C
T2
=
stop
PWM
0
function
enable bit
PWM
1
function
enable bit
PWM
0
output
Port
Port
PWM
1
output
Port
stop
Port
When the contents of the PWM register or PWM prescaler have changed, the PWM
output will change from the next period after the change.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M38275M2-XXXFP | Quad Low-Power Rail-to-Rail Input/Output Op Amp 14-SOIC 0 to 70 |
| M38275M2-XXXFS | Quad Low-Power Rail-to-Rail Input/Output Op Amp 14-PDIP 0 to 70 |
| M38275M2-XXXGP | Quad Low-Power Rail-to-Rail Input/Output Op Amp 14-PDIP 0 to 70 |
| M38275M2-XXXHP | Quad Low-Power Rail-to-Rail Input/Output Op Amp 14-HTSSOP 0 to 70 |
| M38275MCMXXXFS | Quad Low-Power Rail-to-Rail Input/Output Op Amp w/Shutdown 16-SOIC -40 to 125 |
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