參數(shù)資料
型號： M38254M6-XXXGP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù)： 43/73頁
文件大小： 1323K
代理商： M38254M6-XXXGP
Rev.2.02
Jun 19, 2007
page 46 of 73
REJ03B0146-0202
3823 Group
ROM CORRECTION FUNCTION
A part of program in ROM can be corrected.
Set the start address of the corrected ROM data (i.e. an Op code
address of the beginning instruction) to the ROM correction ad-
dress low-order and high-order registers. The program for the
correction is stored in RAM for ROM correction.
When the program is being executed and the value of the program
counter matches with the set address value in the the ROM cor-
rection address registers,the program is branched to the start
address of RAM for ROM correction and then the correction pro-
gram is executed. Use the JMP instruction (3-byte instruction) to
return the main program from the correction program.
The correctable area is up to two. There are two blocks of RAM for
ROM correction:
Block 1: Address 0A0016
Block 2: Address 0A2016
The ROM correction function is controlled by the ROM correction
enable register.
If the ROM correction function is not used, the ROM correction
vector may be used as normal RAM. When using the ROM correc-
tion vector as normal RAM, make sure to set bits 1 and 0 in the
ROM correction enable register to “0” (Disable).
Notes 1: When using the ROM correction function, set the ROM
correction address registers and then enable the ROM
correction with the ROM correction enable register.
2: Do not set addresses other than the ROM area in the
ROM correction address registers.
Do not set the same addresses in both the ROM correc-
tion address 1 registers and the ROM correction address
2 registers.
3: It is necessary to contain the process in the program to
transfer the correction program from an external
EEPROM and others to the RAM for ROM correction.
Fig. 42 ROM correction address register
Fig. 44 Structure of ROM correction enable register
001016
ROM correction address 1 high-order register (RCA1H)
001116
001216
001316
ROM correction address 1 low-order register (RCA1L)
ROM correction address 2 low-order register (RCA2L)
ROM correction address 2 high-order register (RCA2H)
Note: Do not set addressed other than the ROM area.
Address 1 enable bit (RC0)
0 : Disable
1 : Enable
Address 2 enable bit (RC1)
0 : Disable
1 : Enable
Not used (returns “0” when read)
ROM correction enable register (Address 001416) (Note)
RCR
b7b0
Note: Set the ROM correction address registers before enabling the ROM correction with the
ROM correction enable register.
Fig. 43 RAM for ROM correction
RAM 1 for ROM correction
RAM 2 for ROM correction
0A0016
0A1F16
0A2016
0A3F16
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