參數(shù)資料
型號(hào)： M38221MCHXXXFP
廠(chǎng)商： Mitsubishi Electric Corporation
元件分類(lèi)： FPGA
英文描述： 800000 SYSTEM GATE 2.5 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 65/78頁(yè)
文件大小： 998K
代理商： M38221MCHXXXFP
68
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3822 Group
MITSUBISHI MICROCOMPUTERS
P00–P07, P10–P17, P20–P27 (Note 1)
P41–P47, P50–P57, P60–P67, P70, P71 (Note 1)
P00–P07, P10–P17, P20–P27 (Note 1)
P41–P47, P50–P57, P60–P67, P70, P71 (Note 1)
P00–P07, P10–P17, P20–P27 (Note 1)
P41–P47, P50–P57, P60–P67, P70, P71 (Note 1)
P00–P07, P10–P17, P20–P27 (Note 1)
P41–P47, P50–P57, P60–P67, P70, P71 (Note 1)
P00–P07, P10–P17 (Note 2)
P20–P27, P41–P47, P50–P57, P60–P67, P70, P71
(Note 2)
P00–P07, P10–P17 (Note 2)
P20–P27, P41–P47, P50–P57, P60–P67, P70, P71
(Note 2)
P00–P07, P10–P17 (Note 3)
P20–P27, P41–P47, P50–P57, P60–P67, P70, P71
(Note 3)
P00–P07, P10–P17 (Note 3)
P20–P27, P41–P47, P50–P57, P60–P67, P70, P71
(Note 3)
–40
40
–20
20
–2
–5
(VCC = 2.0 to 5.5 V, Ta = –20 to 85°C, unless otherwise noted)
Notes 1: The total output current is the sum of all the currents flowing through all the applicable ports. The total average current is an average value
measured over 100 ms. The total peak current is the peak value of all the currents.
2: The peak output current is the peak current flowing in each port.
3: The average output current is an average value measured over 100 ms.
4: When the oscillation frequency has a duty cycle of 50 %.
5: When using the microcomputer in low-speed mode, make sure that the sub-clock input oscillation frequency on condition that f(XCIN) < f(XIN)/3.
“H” total peak output current
“L” total peak output current
“H” total average output current
“L” total average output current
“H” peak output current
ΣIOH(peak)
ΣIOL(peak)
ΣIOH(avg)
ΣIOL(avg)
IOH(peak)
Symbol
Parameter
Limits
Min.
mA
Unit
Typ.
Max.
IOL(peak)
IOH(avg)
IOL(avg)
5
10
–1.0
–2.5
mA
“L” peak output current
2.5
5.0
4.0
VCC
8.0
2VCC
8.0
50
“H” average output current
“L” average output current
Input frequency for timers X and Y
(duty cycle 50%)
IOL(avg)
f(CNTR0)
f(CNTR1)
MHz
kHz
(4.0 V
≤ VCC ≤ 5.5 V)
(2.0 V
≤ VCC ≤ 4.0 V)
32.768
High-speed mode
(4.0 V
≤ VCC ≤ 5.5 V)
High-speed mode
(2.0 V
≤ VCC ≤ 4.0 V)
Middle-speed mode
Main clock input oscillation frequency
(Note 4)
Sub-clock input oscillation frequency (Notes 4, 5)
f(XIN)
f(XCIN)
Table 49 Recommended operating conditions (H version)
相關(guān)PDF資料
PDF描述
M38221MCHXXXFS 800000 SYSTEM GATE 2.5 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M38221MCHXXXFS 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38221MCHXXXGP 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38221MCHXXXHP 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38221MCMFP 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38221MCMFS 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
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