67
3819 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
A-D converter
A-D conversion is started by setting A-D conversion completion bit to “0”. During A-D conversion, internal operations
are performed as follows.
1. After the start of A-D conversion, A-D conversion register goes to “0016.”
2. The highest-order bit of A-D conversion register is set to “1”, and the comparison voltage Vref is input to the
comparator. Then, Vref is compared with analog input voltage VIN.
3. As a result of comparison, when Vref < VIN, the highest-order bit of A-D conversion register becomes “1.” When
Vref > VIN, the highest-order bit becomes “0.”
By repeating the above operations up to the lowest-order bit of the A-D conversion register, an analog value converts
into a digital value.
A-D conversion completes at 50 clock cycles (11.9
s at f(XIN) = 8.4 MHz) after it is started, and the result of the
conversion is stored into the A-D conversion register.
Concurrently with the completion of A-D conversion, A-D conversion interrupt request occurs, so that the A-D
conversion interrupt request bit is set to “1”.
Relative formula for a reference voltage VREF of A-D converter and Vref
When n = 0
Vref = 0
When n = 1 to 255
Vref =
! (n–0.5)
n : the value of A-D converter (decimal numeral)
VREF
256
Table 6. Change of A-D conversion register during A-D conversion
At start of conversion
First comparison
Second comparison
Third comparison
After completion of eighth
comparison
Value of comparison voltage (Vref)
*1 : A result of the first comparison
*3 : A result of the third comparison
*5 : A result of the fifth comparison
*7 : A result of the seventh comparison
*2 : A result of the second comparison
*4 : A result of the fourth comparison
*6 : A result of the sixth comparison
*8 : A result of the eighth comparison
0
2
VREF
512
VREF
–
2
VREF
4
VREF
±
512
VREF
–
2
VREF
4
VREF
±
8
VREF
±
512
VREF
–
A result of A-D conversion
00
0
Change of A-D conversion register
1
0
0000
0
*1
1
0
0000
0
*1
*2
1
0000
0
*1
*2
*3
*4
*5
*6
*7
*8