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參數(shù)資料
| 型號： | M38198MD-XXXFP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 27/60頁 |
| 文件大?。?/td> | 664K |
| 代理商： | M38198MD-XXXFP |
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27
3819 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
G
Setting of Serial I/O Automatic Transfer
Timing
The timing of serial I/O automatic transfer is set with the serial
I/O1 control register (address 0019
16
) and the serial I/O auto-
matic transfer interval register (address 001C
16
).
The serial I/O1 control register sets the transfer clock speed,
and the serial I/O automatic transfer interval register sets the
serial I/O automatic transfer interval. This setting of transfer in-
terval is valid only when selecting the internal clock as the
clock source.
G
Start of Serial I/O Automatic Transfer
Automatic transfer mode is set by writing “1” to the bit 0 of the
serial I/O automatic transfer control register (address 001A
16
),
then automatic transfer starts by writing “1” to the bit 1.
The bit 1 of the serial I/O automatic transfer control register is
always “1” during automatic transfer; writing “0” can complete
the serial I/O automatic transfer.
G
Operation in Serial I/O Automatic Transfer
Modes
There are two modes for serial I/O automatic transfer: full du-
plex mode and transmit-only mode. Either internal or external
clock can be selected for each of these modes.
(2.1) Operation in Full Duplex Mode
In full duplex mode, data can be transmitted and received at the
same time. Data in the automatic transfer RAM is transmitted in
sequence in accordance with the serial I/O automatic transfer data
pointer and simultaneously reception data is written to the auto-
matic transfer RAM.
The transfer timing of each bit is the same as that in ordinary op-
eration mode, and the transfer clock stops at “H” after eight
transfer clocks are counted.
When selecting the internal clock, the transfer clock remains at “H”
for the time set with the serial I/O automatic transfer interval regis-
ter, then the data at the next address (the address is indicated with
the serial I/O automatic transfer data pointer) are transferred.
If when selecting the external clock, the setting of the automatic
transfer interval register is invalid, so control the transfer clock ex-
ternally.
The last data transfer completes when the contents of the serial
I/O automatic transfer pointer reach “00
16
”. At that point, the serial
I/O automatic transfer interrupt request bit is set to “1” and the bit
1 of the serial I/O automatic transfer control register is cleared to
“0” to complete the serial I/O automatic transfer.
(2.2) Operation in Transmit-Only Mode
The operation in transmit-only mode is the same as that in full du-
plex mode, except for that data is not transferred from the serial
I/O1 register to the serial I/O automatic transfer RAM.
Fig. GA-7 Serial I/O1 register transfer operation in full duplex mode
DO
7
DO
6
DO
5
DO
4
DO
3
DO
2
DO
1
DO
0
Transfer clock
DI
1
DI
0
DO
7
DO
6
DO
5
DO
4
DO
3
DO
2
DI
2
DI
1
DI
7
DI
6
DI
5
DI
4
DI
3
DI
2
DI
1
DI
0
DO
7
DO
6
DO
5
DO
4
DO
3
DO
7
DO
6
DO
5
DO
4
DO
3
DO
2
DO
1
DI
0
Transfer direction selection bit
LSB first (SC1
5
= “0” ) : MSB
MSB first (SC1
5
= “1” ) : LSB
LSB
MSB
S
OUT
S
IN
Serial I/O1 register
DI
0
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