參數資料
型號： M38198ED-XXXFS
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機
文件頁數： 25/60頁
文件大?。?/td> 664K
代理商： M38198ED-XXXFS
25
3819 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
(1) Serial I/O Ordinary Mode
Either an internal clock or an external clock can be selected
as the synchronous clock for serial I/O transfer. A dedicated
divider is built in as the internal clock for selecting of 6 clocks.
If internal clock is selected, transfer starts with a write signal
to a serial I/O register (addresses 001B
16
, 001F
16
, or
0026
16
). After 8 bits have been transferred, the S
OUT
pin goes
to high impedance state.
If external clock is selected, control the clock externally be-
cause the contents of the serial I/O register continue to shift
during inputting the transfer clock. In this case, note that the
S
OUT
pin does not go to high impedance state at the comple-
tion of data transfer.
The interrupt request bit is set at the completion of the trans-
fer of 8 bits, regardless of whether the internal or external
clock is selected.
Fig. GA-3 Serial I/O timing in the serial I/O ordinary mode (for LSB first)
(2) Serial I/O Automatic Transfer Mode
The serial I/O1 has the automatic transfer function. For auto-
matic transfer, switch to the automatic transfer mode by
setting the serial I/O automatic transfer control register (ad-
dress 001A
16
).
The following memory spaces and registers used to enable
automatic transfer mode:
32-byte serial I/O automatic transfer RAM
A serial I/O automatic transfer control register
A serial I/O automatic transfer interval register
A serial I/O automatic transfer data pointer
When using serial I/O automatic transfer, set the serial I/O1
control register (address 0019
16
) in the same way as the se-
rial I/O ordinary mode. However, note that when external
clock is selected, port P6
7
becomes the CS input pin by set-
ting the bit 4 (the S
RDY1
output selection bit ) of the serial I/O1
control register to “1”.
Serial I/O Automatic Transfer Control Register
(SIOAC) 001A
16
The serial I/O automatic transfer control register (address 001A
16
)
consists of 4 bits which control automatic transfer.
Fig. GA-4 Structure of serial I/O automatic transfer control register
D
1
Synchronous
clock
Interrupt request bit set
If internal clock is selected, the S
OUT
pin goes to high impedance state
at the completion of data transfer.
Note :
D
0
D
2
D
3
D
4
D
5
D
6
D
7
(Note)
Transfer clock
Serial I/O register
write signal
Serial I/O output
S
OUT
Serial I/O input
S
IN
Receive enable
signal
S
RDY
Automatic transfer control bit
0 : Serial I/O ordinary mode
(serial I/O1 interrupt)
1 : Automatic transfer mode
(serial I/O1 automatic transfer interrupt)
Automatic transfer start bit
0 : Transfer completion
1 : Transferring(starts by writing “1”)
Transfer mode switch bit
0 : Fullduplex(transmit and receive)
mode
1 : Transmit-only mode
Synchronous clock output
pin selection bit
0 : S
CLK11
1 : S
CLK12
Not used (return “0” when read)
b7
Serial I/O automatic transfer control register
(SIOAC : address 001A
16
)
b0
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