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參數(shù)資料
| 型號： | M38194EA-XXXFP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 18/60頁 |
| 文件大?。?/td> | 664K |
| 代理商： | M38194EA-XXXFP |
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18
3819 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
TIMERS
The 3819 group has 6 built-in timers: timer 1, timer 2, timer 3,
timer 4, timer 5, and timer 6.
Each timer has the 8-bit timer latch. The timers count down.
Once a timer reaches 00
16
, at the next count pulse the contents of
each timer latch is loaded into the corresponding timer, and sets
the corresponding interrupt request bit to “1”.
The count can be stopped by setting the stop bit of each timer to
“1”. The internal clock
φ
can be set to either the high-speed mode
or low-speed mode with the CPU mode register. At the same time,
timer internal count source is switched to either f(X
IN
) or f(X
CIN
).
Timer 1 and Timer 2
The count sources of timer 1 and timer 2 can be selected by set-
ting the timer 12 mode register. A rectangular waveform of timer 1
underflow signal divided by 2 is output from the P4
6
/T1
OUT
pin.
The waveform polarity changes each time timer 1 overflows. The
active edge of the external clock CNTR
0
can be switched with the
bit 6 of the interrupt edge selection register.
At reset or when executing the STP instruction, all bits of the timer
12 mode register are cleared to “0”, timer 1 is set to “FF
16
”, and
timer 2 is set to “01
16
”.
Timer 3 and Timer 4
The count sources of timer 3 and timer 4 can be selected by set-
ting the timer 34 mode register. A rectangular waveform of timer 3
underflow signal divided by 2 is output from the P4
7
/T3
OUT
pin.
The waveform polarity changes each time timer 3 overflows.
The active edge of the external clock CNTR
1
can be switched with
the bit 7 of the interrupt edge selection register.
Timer 5 and Timer 6
The count sources of timer 5 and timer 6 can be selected by set-
ting the timer 56 mode register.
A rectangular waveform of timer 6 underflow signal divided by 2 is
output from the P6
1
/PWM pin. The waveform polarity changes
each time timer 6 overflows.
Timer 6 PWM Mode
Timer 6 can output a rectangular waveform with duty cycle n/(n +
m) from the P6
1
/PWM pin by setting the timer 56 mode register
(refer to fig. FB-3). The n is the value set in timer 6 latch (address
0025
16
) and m is the value in the timer 6 PWM register (address
0027
16
). If n is “0”, the PWM output is “L”, if m is “0”, the PWM out-
put is “H”(n=0 is prior than m=0). In the PWM mode, interrupts
occur at the rising edge of the PWM output.
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