- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67763 > M38039MFL-XXXKP 8-BIT, MROM, 16.8 MHz, MICROCONTROLLER, PQFP64 PDF資料下載
參數(shù)資料
| 型號(hào)： | M38039MFL-XXXKP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16.8 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁(yè)數(shù)： | 101/121頁(yè) |
| 文件大?。?/td> | 2071K |
| 代理商： | M38039MFL-XXXKP |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)當(dāng)前第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)
Rev.1.01
Jan 25, 2008
Page 78 of 117
REJ03B0212-0101
3803 Group (Spec.L)
Functions To Inhibit Rewriting Flash Memory Version
To prevent the contents of internal flash memory from being read
out or rewritten easily, this MCU incorporates a ROM code
protect function for use in parallel I/O mode and an ID code
check function for use in standard serial I/O mode.
ROM Code Protect Function
The ROM code protect function is the function to inhibit reading
out or modifying the contents of internal flash memory by using
the ROM code protect control address (address FFDB16) in
parallel I/O mode. Figure 75 shows the ROM code protect
control address (address FFDB16). (This address exists in the
User ROM area.)
If one or both of the pair of ROM code protect bits is set to “0”,
the ROM code protect is turned on, so that the contents of
internal flash memory are protected against readout and
modification. The ROM code protect is implemented in two
levels. If level 2 is selected, the flash memory is protected even
against readout by a shipment inspection LSI tester, etc. When an
attempt is made to select both level 1 and level 2, level 2 is
selected by default.
If both of the two ROM code protect reset bits are set to “00”, the
ROM code protect is turned off, so that the contents of internal
flash memory can be readout or modified. Once the ROM code
protect is turned on, the contents of the ROM code protect reset
bits cannot be modified in parallel I/O mode. Use the serial I/O
or CPU rewrite mode to rewrite the contents of the ROM code
protect reset bits.
Rewriting of only the ROM code protect control address (address
FFDB16) cannot be performed. When rewriting the ROM code
protect reset bit, rewrite the whole user ROM area (block 0)
containing the ROM code protect control address.
Fig 75. Structure of ROM code protect control address
ROM code protect control address (address FFDB16)
ROMCP (FF16 when shipped)
Reserved bits (“1” at read/write)
ROM code protect level 2 set bits (ROMCP2)(1, 2)
b3b2
0 0: Protect enabled
0 1: Protect enabled
1 0: Protect enabled
1 1: Protect disabled
ROM code protect reset bits (ROMCR)(3)
b5b4
0 0: Protect removed
0 1: Protect set bits effective
1 0: Protect set bits effective
1 1: Protect set bits effective
ROM code protect level 1 set bits (ROMCP1)(1)
b7b6
0 0: Protect enabled
0 1: Protect enabled
1 0: Protect enabled
1 1: Protect disabled
b7
1
b0
Notes 1: When ROM code protect is turned on, the internal flash memory is protected
against readout or modification in parallel I/O mode.
2: When ROM code protect level 2 is turned on, ROM code readout by a
shipment inspection LSI tester, etc. also is inhibited.
3: The ROM code protect reset bits can be used to turn off ROM code protect
level 1 and ROM code protect level 2. However, since these bits cannot be
modified in parallel I/O mode, they need to be rewritten in serial I/O mode or
CPU rewrite mode.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M38039FFLSP | 8-BIT, FLASH, 16.8 MHz, MICROCONTROLLER, PDIP64 |
| M38039FFLKP | 8-BIT, FLASH, 16.8 MHz, MICROCONTROLLER, PQFP64 |
| M38049FFLWG | 8-BIT, FLASH, 16.8 MHz, MICROCONTROLLER, PBGA64 |
| M38049FFLHP | 8-BIT, FLASH, 16.8 MHz, MICROCONTROLLER, PQFP64 |
| M38049FFLSP | 8-BIT, FLASH, 16.8 MHz, MICROCONTROLLER, PDIP64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M38049FFFP#U0 | 制造商:Renesas Electronics Corporation 功能描述: |
| M38049FFLHP#U0 | 制造商:Renesas Electronics Corporation 功能描述: |
| M38049RLSS | 功能描述:DEV EMULATOR CHIP RAM 2KB 64SDIP RoHS:否 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 內(nèi)電路編程器、仿真器以及調(diào)試器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 19/Jul/2010 標(biāo)準(zhǔn)包裝:1 系列:* 類型:* 適用于相關(guān)產(chǎn)品:* 所含物品:* |
| M3806 | 功能描述:電纜固定件和配件 LTSCG 625 BLACK RoHS:否 制造商:Heyco 類型:Cable Grips, Liquid Tight 材料:Nylon 顏色:Black 安裝方法:Cable 最大光束直徑:11.4 mm 抗拉強(qiáng)度: |
| M3806 BK001 | 制造商:Alpha Wire Company 功能描述:CBL 8COND 18AWG BLK 1000' |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。