參數(shù)資料
型號(hào): M38039MCH-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PDIP64
封裝: 0.750 INCH, 1.78 MM PITCH, SHRINK, PLASTIC, DIP-64
文件頁(yè)數(shù): 36/117頁(yè)
文件大小: 1873K
代理商: M38039MCH-XXXSP
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)當(dāng)前第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)
Rev.3.11
Apr 5, 2006
Page 25 of 113
REJ03B0017-0311
3803 Group (Spec.H)
INTERRUPTS
The 3803 group (Spec.H)’s interrupts are a type of vector and
occur by 16 sources among 21 sources: eight external, twelve
internal, and one software.
Interrupt Control
Each interrupt is controlled by an interrupt request bit, an
interrupt enable bit, and the interrupt disable flag except for the
software interrupt set by the BRK instruction. An interrupt
occurs if the corresponding interrupt request and enable bits are
“1” and the interrupt disable flag is “0”.
Interrupt enable bits can be set or cleared by software.
Interrupt request bits can be cleared by software, but cannot be
set by software.
The reset and the BRK instruction cannot be disabled with any
flag or bit. The I (interrupt disable) flag disables all interrupts
except the reset and the BRK instruction interrupt.
When several interrupt requests occur at the same time, the
interrupts are received according to priority.
Interrupt Operation
By acceptance of an interrupt, the following operations are
automatically performed:
1. The contents of the program counter and the processor sta-
tus register are automatically pushed onto the stack.
2. The interrupt disable flag is set and the corresponding inter-
rupt request bit is cleared.
3. The interrupt jump destination address is read from the vec-
tor table into the program counter.
Interrupt Source Selection
Which of each combination of the following interrupt sources
can be selected by the interrupt source selection register (address
003916).
1. INT0 or Timer Z
2. CNTR1 or Serial I/O3 reception
3. Serial I/O2 or Timer Z
4. INT4 or CNTR2
5. A/D converter or serial I/O3 transmission
External Interrupt Pin Selection
The occurrence sources of the external interrupt INT0 and INT4
can be selected from either input from INT00 and INT40 pin, or
input from INT01 and INT41 pin by the INT0, INT4 interrupt
switch bit of interrupt edge selection register (bit 6 of address
003A16).
<Notes>
When setting the followings, the interrupt request bit may be set
to “1”.
When setting external interrupt active edge
Related register: Interrupt edge selection register
(address 003A16)
Timer XY mode register (address 002316)
Timer Z mode register (address 002A16)
When switching interrupt sources of an interrupt vector
address where two or more interrupt sources are allocated
Related register: Interrupt source selection register
(address 003916)
When not requiring for the interrupt occurrence synchronized
with these setting, take the following sequence.
(1) Set the corresponding interrupt enable bit to “0” (disabled).
(2) Set the interrupt edge select bit (the active edge switch bit)
or the interrupt source select bit.
(3) Set the corresponding interrupt request bit to “0” after 1 or
more instructions have been executed.
(4) Set the corresponding interrupt enable bit to “1” (enabled).
相關(guān)PDF資料
PDF描述
M38039FFSP 8-BIT, FLASH, 8.4 MHz, MICROCONTROLLER, PDIP64
M38039MFH-XXXKP 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64
M38037M8H-XXXWG 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PBGA64
M38039FFSP 8-BIT, FLASH, 8.4 MHz, MICROCONTROLLER, PDIP64
M38049MC-XXXFP 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M38049FFFP#U0 制造商:Renesas Electronics Corporation 功能描述:
M38049FFLHP#U0 制造商:Renesas Electronics Corporation 功能描述:
M38049RLSS 功能描述:DEV EMULATOR CHIP RAM 2KB 64SDIP RoHS:否 類別:編程器,開(kāi)發(fā)系統(tǒng) >> 內(nèi)電路編程器、仿真器以及調(diào)試器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 19/Jul/2010 標(biāo)準(zhǔn)包裝:1 系列:* 類型:* 適用于相關(guān)產(chǎn)品:* 所含物品:*
M3806 功能描述:電纜固定件和配件 LTSCG 625 BLACK RoHS:否 制造商:Heyco 類型:Cable Grips, Liquid Tight 材料:Nylon 顏色:Black 安裝方法:Cable 最大光束直徑:11.4 mm 抗拉強(qiáng)度:
M3806 BK001 制造商:Alpha Wire Company 功能描述:CBL 8COND 18AWG BLK 1000'