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| 型號(hào)： | M38039FFLWG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 16.8 MHz, MICROCONTROLLER, PBGA64 |
| 封裝： | 6 X 6 MM, 0.65 MM PITCH, PLASTIC, FLGA-64 |
| 文件頁(yè)數(shù)： | 91/121頁(yè) |
| 文件大?。?/td> | 2071K |
| 代理商： | M38039FFLWG |
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Rev.1.01
Jan 25, 2008
Page 69 of 117
REJ03B0212-0101
3803 Group (Spec.L)
FLASH MEMORY MODE
The 3803 group (Spec.L)’s flash memory version has the flash
memory that can be rewritten with a single power source.
For this flash memory, three flash memory modes are available
in which to read, program, and erase: the parallel I/O and
standard serial I/O modes in which the flash memory can be
manipulated using a programmer and the CPU rewrite mode in
which the flash memory can be manipulated by the Central
Processing Unit (CPU).
This flash memory version has some blocks on the flash memory
as shown in Figure 67 and each block can be erased.
In addition to the ordinary User ROM area to store the MCU
operation control program, the flash memory has a Boot ROM
area that is used to store a program to control rewriting in CPU
rewrite and standard serial I/O modes. This Boot ROM area has
had a standard serial I/O mode control program stored in it when
shipped from the factory. However, the user can write a rewrite
control program in this area that suits the user’s application
system. This Boot ROM area can be rewritten in only parallel I/O
mode.
Summary
Table 9 lists the summary of the 3803 group (Spec.L) flash
memory version.
NOTE:
1. The Boot ROM area has had a standard serial I/O mode control program stored in it when shipped from the factory.
This Boot ROM area can be erased and written in only parallel I/O mode.
NOTES:
1. VCC = AVCC = 2.7 V to 5.5 V, Topr = 0
°C to 60 °C, unless otherwise noted.
2. Definition of programming/erase count
The programming/erase count refers to the number of erase operations per block. For example, if block A is a 2 Kbyte block and
2,048 1-byte writes are performed, all to different addresses, after which block A is erased, the programming/erase count is 1. Note
that for each erase operation it is not possible to perform more than one programming (write) operation to the same address
(overwrites prohibited).
3. This is the number of times for which all electrical characteristics are guaranteed after a programming or erase operation. (The
guarantee covers the range from 1 to maximum value.)
4. On systems where reprogramming is performed a large number of times, it is possible to reduce the effective number of overwrites
by sequentially shifting the write address, so that as much of the available area of the block is used up through successive
programming (write) operations before an erase operation is performed. For example, if each programming operation uses 16 bytes
of space, a maximum of 128 programming operations may be performed before it becomes necessary to erase the block in order to
continue. In this way the effective number of overwrites can be kept low. The effective overwrite count can be further reduced by
evenly dividing operations between block A and block B. It is recommended that data be retained on the number of times each
block has been erased and a limit count set.
5. If a block erase error occurs, execute the clear status register command followed by the block erase command a minimum of three
times and until the erase error is no longer generated.
Table 9
Summary of 3803 group (Spec.L)’s flash memory version
Item
Specifications
Power source voltage (VCC)VCC = 2.7 to 5.5 V
Program/Erase VPP voltage (VPP)VCC = 2.7 to 5.5 V
Flash memory mode
3 modes; Parallel I/O mode, Standard serial I/O mode, CPU
rewrite mode
Erase block division
User ROM area/Data ROM area
Refer to Figure 67.
Boot ROM area (1)
Not divided (4 Kbytes)
Program method
In units of bytes
Erase method
Block erase
Program/Erase control method
Program/Erase control by software command
Number of commands
5 commands
Number of program/Erase times
100(Max.)
ROM code protection
Available in parallel I/O mode and standard serial I/O mode
Table 10 Electrical characteristics of flash memory (program ROM)
Symbol
Parameter
Test conditions
Limits
Unit
Min.
Typ.
Max.
Byte programming time
VCC = 5.0 V, Topr = 25
°C
60
400
s
Block erase time
(Block 1)
VCC = 5.0 V, Topr = 25
°C
0.5
9
s
(Block 2)
0.9
9
s
(Block 3)
1.3
9
s
(Block A, B)
0.3
9
s
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相關(guān)代理商/技術(shù)參數(shù) |
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| M38039FFSP | 制造商:Mitsubishi Electric 功能描述:8-BIT, FLASH, 8.4 MHz, MICROCONTROLLER, PDIP64 |
| M38039G4HHP#U0 | 功能描述:IC 740/3803 MCU QZROM 64LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標(biāo)準(zhǔn)包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設(shè)備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲(chǔ)器容量:- 程序存儲(chǔ)器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
| M38039G4HKP#U0 | 功能描述:IC 3803 MCU ROMLESS 64LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標(biāo)準(zhǔn)包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設(shè)備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲(chǔ)器容量:- 程序存儲(chǔ)器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
| M38039G4HSP#U0 | 功能描述:IC 740/3803 MCU QZROM 64DIP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標(biāo)準(zhǔn)包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設(shè)備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲(chǔ)器容量:- 程序存儲(chǔ)器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
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