3802 GROUP USER’S MANUAL
1-4
HARDWARE
FUNCTIONAL
BLOCK
DIA
GRAM
(P
ac
ka
g
e
:
64P4B)
FUNCTIONAL BLOCK
Fig. 3 Functional block diagram
CNTR
1
CNTR
0
V
REF
AV
SS
RAM
ROM
CPU
A
X
Y
S
PC
H
PC
L
PS
V
SS
32
RESET
27
V
CC
1
26
CNV
SS
P0(8)
49
50
51
52
53
54
55
56
P1(8)
41
43
45
47
42
44
46
48
P2(8)
33
35
37
39
36
38
40
P3(8)
57
59
61
63
58
60
62
64
P4(8)
20
22
24
28
21
23
25
29
P5(8)
12
14
16
18
13
15
17
19
P6(8)
46
10
59
11
3
34
2
X
IN
30
X
OUT
31
D-A
(8)
D-A
(8)
A-D
(8)
Reset
input
Clock
generating
circuit
Clock
input
Clock
output
Prescaler
12
(8)
Timer
1
(8)
Timer
2
(8)
I/O
port
P4
I/O
port
P0
I/O
port
P1
I/O
port
P2
I/O
port
P3
I/O
port
P5
I/O
port
P6
7
8
SI/O1
(8)
INT
0
INT
2
INT
4
Prescaler
X
(8)
Timer
X
(8)
Prescaler
Y
(8)
Timer
Y
(8)
converter
2
converter
1
~
SI/O2
(8)
PWM
(8)
INT
3
converter