參數(shù)資料
型號： M38007S5-XXXSS
廠商： Mitsubishi Electric Corporation
元件分類： DC/DC變換器
英文描述： 1 watt dc-dc converters
中文描述： 1瓦的DC - DC轉(zhuǎn)換器
文件頁數(shù)： 135/173頁
文件大小： 4203K
代理商： M38007S5-XXXSS
3800 GROUP USER’S MANUAL
3-33
APPENDIX
3.5 List of registers
Operating mode of
Timer X/Timer Y
Timer mode
Pulse output mode
Event counter mode
Pulse width measurement mode
Table. 3.5.1 Function of CNTR
0
/CNTR
1
edge switch bit
Fig. 3.5.11 Structure of Timer XY mode register
Function of CNTR
0
/CNTR
1
edge switch bit (bits 2 and 6)
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
Generation of CNTR
0
/CNTR
1
interrupt request : Falling edge
(No effect on timer count)
Generation of CNTR
0
/CNTR
1
interrupt request : Rising edge
(No effect on timer count)
Start of pulse output : From “H” level
Generation of CNTR
0
/CNTR
1
interrupt request : Falling edge
Start of pulse output : From “L” level
Generation of CNTR
0
/CNTR
1
interrupt request : Rising edge
Timer X/Timer Y : Count of rising edge
Generation of CNTR
0
/CNTR
1
interrupt request : Falling edge
Timer X/Timer Y : Count of falling edge
Generation of CNTR
0
/CNTR
1
interrupt request : Rising edge
Timer X/Timer Y : Measurement of “H” level width
Generation of CNTR
0
/CNTR
1
interrupt request : Falling edge
Timer X/Timer Y : Measurement of “L” level width
Generation of CNTR
0
/CNTR
1
interrupt request : Rising edge
A
A
AA
AA
Function
Timer XY mode register
b7 b6 b5 b4 b3 b2 b1 b0
B
0
At reset
R W
0
1
2
3
4
5
6
7
0
0
0
0
0
0
0
Timer XY mode register (TM)
Name
Timer X operating mode bit
CNTR
0
active edge switch bit
Timer Y operating mode bit
CNTR
1
active edge switch bit
0 1 : Pulse output mode
1 0 : Event counter mode
1 1 : Pulse width measurement mode
It depends on the operating mode
of the Timer X (refer to Table 3.5.1).
0 : Count start
1 : Count stop
0 1 : Pulse output mode
1 0 : Event counter mode
1 1 : Pulse width measurement mode
It depends on the operating mode
of the Timer Y (refer to Table 3.5.1).
0 : Count start
1 : Count stop
b5 b4
Timer X count stop bit
[Address : 23
16
]
b1 b0
Timer Y count stop bit
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