參數(shù)資料
型號: M38005S8-XXXHP
廠商: Mitsubishi Electric Corporation
元件分類: 串行ADC
英文描述: 8-Bit 41 kSPS ADC Serial Out, Ratiometric Op or Vcc Ref, TTL/MOS Input & Output Compatible, 4 Ch. 14-SOIC
中文描述: 8位單片機
文件頁數(shù): 107/173頁
文件大?。?/td> 4203K
代理商: M38005S8-XXXHP
3-5
3800 GROUP USER’S MANUAL
APPENDIX
3.1 Electrical characteristics
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time (Note 1)
Serial I/O output valid time (Note 1)
Serial I/O clock output rising time
Serial I/O clock output falling time
CMOS output rising time (Note 2)
CMOS output falling time (Note 2)
140
30
30
30
30
Symbol
Parameter
Limits
Typ.
Min.
ns
ns
ns
ns
ns
ns
ns
ns
Unit
Table 3.1.6 Switching characteristics (1)
(V
CC
= 4.0 to 5.5 V, V
SS =
0 V, T
a
= –20 to 85
°
C, unless otherwise noted)
t
c(S
CLK
)
/2–30
t
c(S
CLK
)
/2–30
–30
10
10
Max.
t
WH(S
CLK
)
t
WL(S
CLK
)
t
d(S
CLK
–T
X
D)
t
v(S
CLK
–T
X
D)
t
r(S
CLK
)
t
f(S
CLK
)
t
r(CMOS)
t
f(CMOS)
Test conditions
Fig. 3.1.1
Note1:
When the P4
5
/T
X
D P-channel output disable bit of the UART control register (bit 4 of address 001B
16
) is “0”.
2:
X
OUT
pin is excluded.
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time (Note 1)
Serial I/O output valid time (Note 1)
Serial I/O clock output rising time
Serial I/O clock output falling time
CMOS output rising time (Note 2)
CMOS output falling time (Note 2)
350
50
50
50
50
Symbol
Parameter
Limits
Typ.
Min.
ns
ns
ns
ns
ns
ns
ns
ns
Unit
Table 3.1.7 Switching characteristics (2)
(V
CC
= 3.0 to 4.0 V, V
SS =
0 V, T
a
= –20 to 85
°
C, unless otherwise noted)
t
c(S
CLK
)
/2–50
t
c(S
CLK
)
/2–50
–30
20
20
Max.
t
WH(S
CLK
)
t
WL(S
CLK
)
t
d(S
CLK
–T
X
D)
t
v(S
CLK
–T
X
D)
t
r(S
CLK
)
t
f(S
CLK
)
t
r(CMOS)
t
f(CMOS)
Test conditions
Fig. 3.1.1
Note1:
When the P4
5
/T
X
D P-channel output disable bit of the UART control register (bit 4 of address 001B
16
) is “0”.
2:
X
OUT
pin is excluded.
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PDF描述
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