參數(shù)資料
型號： M38005M3-XXXFP
廠商： Mitsubishi Electric Corporation
英文描述： 1Gbps to 6.25Gbps Cable and PC Board Equalizer 16-QFN
中文描述： 8位單片機
文件頁數(shù)： 67/173頁
文件大?。?/td> 4203K
代理商： M38005M3-XXXFP
APPLICATION
2.2 Timer
2-19
3800 GROUP USER’S MANUAL
Control procedure :
Figure 2.2.19 shows a control procedure.
Fig. 2.2.19 Control procedure [Measurement of frequency]
RTI
(A) TY (Address : 27
16
)
TY
IREQ1
(Address : 27
16
)
(Address : 3C
16
), bit5
256 – 1
0
0
Fpulse 0
Fpulse 1
Processing for a result of judgment
214 (A) 228
Compare the count value read with the
reference value.
Store the comparison result in flag Fpulse.
Out of range
In range
G
G
G
G
G
G
Pop registers
Pop registers which is pushed to stack.
G
Read the count value.
Store the count value in the accumulator (A).
Initialize the count value.
Set the Timer Y interrupt request bit to “0.”
RESET
Initialization
S.
TM
PRE12
T1
PREY
TY
I.
TM
.
CLI
(Address : 23
16
)
(Address : 20
16
)
(Address : 21
16
)
(Address : 26
16
)
(Address : 27
16
)
(Address : 3E
16
), bit6
(Address : 23
16
), bit7
1110
XXXX
2
64–1
8–1
1–1
256–1
1
1
Timer 1 interrupt processing routine
IREQ1 (Address : 3C
16
), bit5
G
G
G
G
G
G
G
Set the division ratio so that the Timer 1 interrupt
occurs every 2 ms.
Timer 1 interrupt : Enabled
Timer Y count : Start
G
Note 1:
When using the Index X mode flag (T).
Note 2:
When using the Decimal mode flag (D).
Push the register used in the interrupt
processing routine into the stack.
G
X
: This bit is not used in this application.
Set it to
“0”
or
“1.”
It’s value can be disregarded.
0
When the count value is 256 or more, the
processing is performed as out of range.
Timer Y : Event counter mode
(Count at falling edge of pulse input from CNTR
1
pin)
All interrupts : Disabled
Interrupts : Enabled
CLT (
Note 1
)
CLD (
Note 2
)
Push register to stack
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