參數(shù)資料
型號: M38005M1-XXXFS
廠商: Mitsubishi Electric Corporation
英文描述: 4.25 Gbps Cable And PC Board Equalizer 16-QFN -40 to 85
中文描述: 8位單片機(jī)
文件頁數(shù): 72/173頁
文件大小: 4203K
代理商: M38005M1-XXXFS
2-24
3800 GROUP USER’S MANUAL
APPLICATION
2.3 Serial I/O
2.3.2 Related registers
Fig. 2.3.2 Structure of Transmit/Receive buffer register
Fig. 2.3.3 Structure of Serial I/O status register
Transmit/Receive buffer register
b7 b6 b5 b4 b3 b2 b1 b0
B
0
Function
At reset
R W
1
2
3
4
6
7
Transmit/Receive buffer register
(TB/RB) [Address : 18
16
]
A transmission data is written to or a receive data is read out
from this buffer register.
At writing : a data is written to the Transmit buffer register.
At reading : a content of the Receive buffer register is read out.
5
Note :
A content of the Transmit buffer register cannot be read out.
A data cannot be written to the Receive buffer register.
b7 b6 b5 b4 b3 b2 b1 b0
B
0
Function
At reset
R W
0
1
2
3
4
5
6
7
0
0
0
0
0
0
1
Serial I/O status reigster (SIOSTS) [Address : 19
16
]
Name
Transmit buffer empty flag
(TBE)
0 : (OE)
1 : (OE)
(PE)
(PE)
(FE) = 0
(FE) = 1
Overrun error flag (OE)
0 : Buffer full
1 : Buffer empty
0 : Buffer empty
1 : Buffer full
0 : Transmit shift in progress
1 : Transmit shift completed
0 : No error
1 : Overrun error
0 : No error
1 : Parity error
0 : No error
1 : Framing error
Nothing is allocated for this bit. It is a write disabled bit.
When this bit is read out, the value is “0.”
Receive buffer full flag (RBF)
Transmit shift register shift
completion flag (TSC)
Parity error flag (PE)
Framing error flag (FE)
Summing error flag (SE)
Serial I/O status register
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