參數(shù)資料
型號： M38004E8SP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDIP64
封裝： 0.750 INCH, 1.78 MM PITCH, PLASTIC, SDIP-64
文件頁數(shù)： 118/174頁
文件大?。?/td> 1752K
代理商： M38004E8SP
HARDWARE
1-33
3800 GROUP USER’S MANUAL
FUNCTIONAL DESCRIPTION SUPPLEMENT
Interrupt
3800 group permits interrupts on the basis of 15 sources. It is vec-
tor interrupts with a fixed priority system. Accordingly, when two or
more interrupt requests occur during the same sampling, the
higher-priority interrupt is accepted first. This priority is determined
by hardware, but variety of priority processing can be performed
by software, using an interrupt enable bit and an interrupt disable
flag.
For interrupt sources, vector addresses and interrupt priority, refer
to “Table 10.”
Table 10. Interrupt sources, vector addresses and interrupt priority
Note: Reset functions in the same way as an interrupt with the highest priority.
Priority
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Remarks
Non-maskable
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
Valid when serial I/O is selected
STP release timer underflow
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
Non-maskable software interrupt
Vector addresses
FFFD16
FFFB16
FFF916
FFF716
FFF516
FFF316
FFF116
FFEF16
FFED16
FFEB16
FFE916
FFE716
FFE516
FFE316
FFE116
FFDD16
FFFC16
FFFA16
FFF816
FFF616
FFF416
FFF216
FFF016
FFEE16
FFEC16
FFEA16
FFE816
FFE616
FFE416
FFE216
FFE016
FFDC16
High-order
Low-order
Interrupt sources
Reset (Note)
INT0 interrupt
INT1 interrupt
Serial I/O receive interrupt
Serial I/O transmit interrupt
Timer X interrupt
Timer Y interrupt
Timer 1 interrupt
Timer 2 interrupt
CNTR0 interrupt
CNTR1 interrupt
INT2 interrupt
INT3 interrupt
INT4 interrupt
INT5 interrupt
BRK instruction interrupt
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