參數(shù)資料
型號： M38004E8-XXXFP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP64
封裝： 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件頁數(shù)： 18/174頁
文件大小： 1752K
代理商： M38004E8-XXXFP
3-11
3800 GROUP USER’S MANUAL
APPENDIX
3.1 Electrical characteristics
Table 3.1.17 Timing requirements in memory expansion mode and microprocessor mode
(Extended operating temperature version) (VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = –40 to 85
°C, unless otherwise noted)
Table 3.1.18 Switching characteristics in memory expansion mode and microprocessor mode
(Extended operating temperature version) (VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = –40 to 85
°C, unless otherwise noted)
Before
φ ONW input set up time
After
φ ONW input hold time
Before
φ data bus set up time
After
φ data bus hold time
Before RD ONW input set up time
Before WR ONW input set up time
After RD ONW input hold time
After WR ONW input hold time
Before RD data bus set up time
After RD data bus hold time
tsu(ONW–
φ)
th(
φ–ONW)
tsu(DB–
φ)
th(
φ–DB)
tsu(ONW–RD)
tsu(ONW–WR)
th(RD–ONW)
th(WR–ONW)
tsu(DB–RD)
th(RD–DB)
Symbol
Parameter
Limits
Min.
ns
Unit
–20
60
0
–20
65
0
Typ.
Max.
φ clock cycle time
φ clock “H” pulse width
φ clock “L” pulse width
After
φ AD15–AD8 delay time
After
φ AD15–AD8 valid time
After
φ AD7–AD0 delay time
After
φ AD7–AD0 valid time
SYNC delay time
SYNC valid time
RD and WR delay time
RD and WR valid time
After
φ data bus delay time
After
φ data bus valid time
RD pulse width, WR pulse width
(When one-wait is valid)
After AD15–AD8 RD delay time
After AD15–AD8 WR delay time
After AD7–AD0 RD delay time
After AD7–AD0 WR delay time
After RD AD15–AD8 valid time
After WR AD15–AD8 valid time
After RD AD7–AD0 valid time
After WR AD7–AD0 valid time
After WR data bus delay time
After WR data bus valid time
RESETOUT output delay time
RESETOUT output valid time (Note)
40
45
20
10
70
65
200
Symbol
Parameter
Limits
Min.
ns
Unit
tc(XIN)–10
6
3
15
tc(XIN)–10
3tc(XIN)–10
tc(XIN)–35
tc(XIN)–40
0
10
0
2tc(XIN)
20
10
25
10
20
10
5
20
tc(XIN)–15
tc(XIN)–20
5
15
Typ.
Max.
Test conditions
Note : The RESETOUT output goes “H” in sync with the fall of the
φ clock that is anywhere between about 8 cycle and 13 cycles after
the RESET input goes “H”.
Fig. 3.1.1
tc(
φ)
twH(
φ)
twL(
φ)
td(
φ–AH)
tv(
φ–AH)
td(
φ–AL)
tv(
φ–AL)
td(
φ–SYNC)
tv(
φ–SYNC)
td(
φ–WR)
tv(
φ–WR)
td(
φ–DB)
tv(
φ–DB)
twL(RD)
twL(WR)
td(AH–RD)
td(AH–WR)
td(AL–RD)
td(AL–WR)
tv(RD–AH)
tv(WR–AH)
tv(RD–AL)
tv(WR–AL)
td(WR–DB)
tv(WR–DB)
td(RESET–RESETOUT)
tv(
φ–RESET)
Fig. 3.1.1 Circuit for measuring output switching
characteristics
Measurement output pin
100pF
CMOS output
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M38004E8-XXXFS 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8-BIT SINGLE-CHIP MICROCOMPUTER
M38004E8-XXXHP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8-BIT SINGLE-CHIP MICROCOMPUTER
M38004E8-XXXSP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8-BIT SINGLE-CHIP MICROCOMPUTER
M38004E8-XXXSS 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8-BIT SINGLE-CHIP MICROCOMPUTER
M38004M1-DXXXFP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
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