參數(shù)資料
型號: M38003M8-XXXSP
廠商: Mitsubishi Electric Corporation
英文描述: 1.5 to 2.5 Gbps Transceiver 64-HVQFP -40 to 85
中文描述: 8位單片機
文件頁數(shù): 122/173頁
文件大?。?/td> 4203K
代理商: M38003M8-XXXSP
3800 GROUP USER’S MANUAL
3-20
APPENDIX
3.3 Notes on use
3.3.4 Notes on input and output pins
(1) Fix of a port input level in stand-by state
Fix input levels of an input and an I/O port for getting effect of low-power dissipation in stand-by state*, especially
for the I/O ports of the N-channel open-drain.
Pull-up (connect the port to V
CC
) or pull-down (connect the port to V
SS
) these ports through a resistor.
When determining a resistance value, make sure the following:
G
External circuit
G
Variation of output levels during the ordinary operation
*
stand-by state : the stop mode by executing the
STP
instruction
the wait mode by executing the
WIT
instruction
Reason
Even when setting as an output port with its direction register, in the following state :
G
N-channel......when the content of the port latch is “1”
the transistor becomes the OFF state, which causes the ports to be the high-impedance state. Make sure that the
level becomes “undefined” depending on external circuits.
Accordingly, the potential which is input to the input buffer in a microcomputer is unstable in the state that input
levels of an input and an I/O port are “undefined.” This may cause power source current.
(2) Modify of the content of I/O port latch
When the content of the port latch of an I/O port is modified with the bit managing instruction*, the value of the
unspecified bit may be changed.
Reason
The bit managing instruction is read-modify-write instruction for reading and writing data by a byte unit.
Accordingly, when this instruction is executed on one bit of the port latch of an I/O port, the following is executed
to all bits of the port latch.
G
As for a bit which is set as an input port : The pin state is read in the CPU, and is written to this bit after bit
managing.
G
As for a bit which is set as an output port : The bit value is read in the CPU, and is written to this bit after bit
managing.
Make sure the following :
G
Even when a port which is set as an output port is changed for an input port, its port latch holds the output data.
G
Even when a bit of a port latch which is set as an input port is not speccified with a bit managing instruction,
its value may be changed in case where content of the pin differs from a content of the port latch.
* bit managing instructions :
SEB
and
CLB
instruction
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