參數(shù)資料
型號: M38003M2-XXXHP
廠商: Mitsubishi Electric Corporation
英文描述: 1.0 to 1.6 Gigabit Ethernet Transceiver 64-HVQFP 0 to 70
中文描述: 8位單片機
文件頁數(shù): 70/173頁
文件大?。?/td> 4203K
代理商: M38003M2-XXXHP
2-22
3800 GROUP USER’S MANUAL
APPLICATION
2.2 Timer
Fig. 2.2.22 Control procedure [Measurement of pulse width]
Figure 2.2.22 shows a control procedure.
Initialization
SEI
.
All interrupts : Disabled
Timer X : Pulse width measurement mode
(Count “H” level width of pulse input from CNTR
0
pin.)
Set the division ratio so that the Timer X interrupt
occurs every 250 ms.
Timer X interrupt : Enabled
CNTR
0
interrupt : Enabled
G
G
G
G
G
G
TM
PREX
TX
ICON1
IREQ1
ICON2
IREQ2
.
.
CLI
(Address : 23
16
)
(Address : 24
16
)
(Address : 25
16
)
(Address : 3E
16
), bit4
(Address : 3C
16
), bit4
(Address : 3F
16
), bit0
(Address : 3D
16
), bit0
(Address : 23
16
), bit3
256–1
256–1
1
0
1
0
0
G
X
: This bit is not used in this application.
Set it to
“0”
or
“1.”
It’s value can be disregarded.
Timer X interrupt processing routine
Processing for error
RTI
Error occurs
G
CNTR
0
interrupt processing routine
CLT (
Note 1
)
CLD (
Note 2
)
Push register to stack
RTI
Pop registers
G
G
A count value is read out and stored to RAM.
Set the division ratio so that the Timer X
interrupt occurs every 250 ms.
G
G
(A)
Result of pulse width measurement
low–order 8-bit
(A)
Result of pulse width measurement
high–order 8-bit
PREX (Address : 24
16
)
TX (Address : 25
16
)
PREX
Inversion of (A)
TX
256 – 1
Inversion of (A)
256 – 1
Push the register used in the interrupt
processing routine into the stack.
Pop registers which is pushed to stack
.
Interrupts : Enabled
Timer X count : Start
G
Note 1:
When using the Index X mode flag (T).
Note 2:
When using the Decimal mode flag (D).
XXXX
1011
2
RESET
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