參數(shù)資料
型號: M38002E4SS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, UVPROM, 8 MHz, MICROCONTROLLER, CDIP64
封裝: 0.750 INCH, 1.78 MM PITCH, WINDOWED, CERAMIC, SDIP-64
文件頁數(shù): 156/174頁
文件大?。?/td> 1752K
代理商: M38002E4SS
2-33
3800 GROUP USER’S MANUAL
APPLICATION
2.3 Serial I/O
Fig. 2.3.16 Setting of related registers at a receiving side [Communication using a clock
synchronous serial I/O]
b7
b0
Receiving side
Serial I/O control register (Address : 1A16)
SIOCON
Serial I/O synchronous clock selection bit : External clock
SRDY
output enable bit : Use the SRDY output
Transmit enable bit : Transmit enabled
Set this bit to “1,” using SRDY output.
Receive enable bit : Receive enabled
Serial I/O mode selection bit : Clock synchronous serial I/O
Serial I/O enable bit : Serial I/O enabled
Serial I/O status register (Address : 1916)
SIOSTS
Receive buffer full flag
Check a completion of receiving 1-byte data with this flag.
“1” : At completing to receive
“0” : At reading out a receive buffer
b7
b0
1 111
11
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