參數(shù)資料
型號: M38002E2SP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDIP64
封裝: 0.750 INCH, PLASTIC, SDIP-64
文件頁數(shù): 113/173頁
文件大?。?/td> 4203K
代理商: M38002E2SP
1-30
HARDWARE
3800 GROUP USER’S MANUAL
Bus control with memory expansion
The 3800 group has a built-in ONW function to facilitate access to
external memory and I/O devices in memory expansion mode or
microprocessor mode.
If an “L” level signal is input to the ONW pin when the CPU is in a
read or write state, the corresponding read or write cycle is ex-
tended by one cycle of
φ. During this extended period, the RD or
WR signal remains at “L”. This extension period is valid only for
writing to and reading from addresses 000016 to 000716 and
044016 to FFFF16 in microprocessor mode, 004016 to YYYY16 in
memory expansion mode, and only read and write cycles are ex-
tended.
Fig. 30 ONW function timing
FUNCTIONAL DESCRIPTION
φ
Read cycle
Write cycle
Dummy cycle Write cycle
Read cycle Dummy cycle
AD15 to AD0
Period during which ONW input signal is received
During this period, the ONW signal must be fixed at either “H” or “L”. At all other times, the input level of the ONW
signal has no affect on operations.
The bus cycles is not extended for an address in the area 000816 to 043F16, regardless of whether the ONW signal
is received.
V :
V
ONW
WR
RD
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