參數(shù)資料
型號： M38001S8-XXXSS
廠商： Mitsubishi Electric Corporation
英文描述： Excalibur JFET-Input High-Output-Drive uPower Operational Amplifier 8-SOIC
中文描述： 8位單片機
文件頁數(shù)： 162/173頁
文件大?。?/td> 4203K
代理商： M38001S8-XXXSS
APPENDIX
3.9 Machine instructions
3-60
3800 GROUP USER’S MANUAL
Addressing mode
Symbol
Function
Details
IMP
IMM
A
BIT, A
ZP
BIT, ZP
OP n
# OP n
# OP n
# OP n
# OP n
#
OP n
#
Jumps to the specified address.
After storing contents of program counter in
stack, and jumps to the specified address.
Load accumulator with contents of memory.
Load memory indicated by index register X
with contents of memory specified by the ad-
dressing mode.
Load memory with immediate value.
Load index register X with contents of
memory.
Load index register Y with contents of
memory.
Shift the contents of accumulator or memory
to the right by one bit.
The low order bit of accumulator or memory is
stored in carry, 7th bit is cleared.
Multiplies the accumulator with the contents of
memory specified by the zero page X address-
ing mode and stores the high byte of the result
on the stack and the low byte in the accumula-
tor.
No operation.
“Logical OR’s” the contents of memory and ac-
cumulator. The result is stored in the
accumulator.
“Logical OR’s” the contents of memory indi-
cated by index register X and contents of
memory specified by the addressing mode.
The result is stored in the memory specified by
index register X.
JMP
JSR
LDA
(Note 2)
LDM
LDX
LDY
LSR
MUL
NOP
ORA
(Note 1)
If addressing mode is ABS
PC
L
←
AD
L
PC
H
←
AD
H
If addressing mode is IND
PC
L
←
M (AD
H
, AD
L
)
PC
H
←
M (AD
H
, AD
L
+ 1)
If addressing mode is ZP, IND
PC
L
←
M(00, AD
L
)
PC
H
←
M(00, AD
L
+ 1)
M(S)
←
PC
H
S
←
S – 1
M(S)
←
PC
L
S
←
S – 1
After executing the above,
if addressing mode is ABS,
PC
L
←
AD
L
PC
H
←
AD
H
if addressing mode is SP,
PC
L
←
AD
L
PC
H
←
FF
If addressing mode is ZP, IND,
PC
L
←
M(00, AD
L
)
PC
H
←
M(00, AD
L
+ 1)
When T = 0
A
←
M
When T = 1
M(X)
←
M
M
←
nn
X
←
M
Y
←
M
M(S) · A
←
A
M(zz + X)
S
←
S – 1
PC
←
PC + 1
When T = 0
A
←
A V M
When T = 1
M(X)
←
M(X) V M
A9
A2
A0
09
4A 2
1
A5
3C
A6
A4
46
05
3
4
3
3
5
3
2
3
2
2
2
2
EA 2
1
2
2
2
2
2
2
2
2
7 0
0
→
→
C
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