參數(shù)資料
型號(hào): M38001S3-XXXSS
廠商: Mitsubishi Electric Corporation
英文描述: High Speed High Drive Precision Quad Operational Amplifier 20-LCCC -55 to 125
中文描述: 8位單片機(jī)
文件頁數(shù): 87/173頁
文件大?。?/td> 4203K
代理商: M38001S3-XXXSS
APPLICATION
2.3 Serial I/O
2-39
3800 GROUP USER’S MANUAL
(3) Cyclic transmission or reception of block data (data of a specified number of bytes)
between microcomputers
[without using an automatic transfer]
Outline :
When a clock synchronous serial I/O is used for communication, synchronization of the clock
and the data between the transmitting and receiving sides may be lost because of noise
included in the synchronizing clock. Thus, it is necessary to be corrected constantly. This
“heading adjustment” is carried out by using the interval between blocks in this example.
Fig. 2.3.24 Connection diagram [Cyclic transmission or reception of block data between
microcomputers]
Specifications :
The serial I/O is used (clock synchronous serial I/O is selected).
Synchronous clock frequency : 131 kHz (f(X
IN
) = 4.19 MHz is divided by 32)
Byte cycle: 488
μ
s
Number of bytes for transmission or reception : 8 byte/block
Block transfer cycle : 16 ms
Block transfer period : 3.5 ms
Interval between blocks : 12.5 ms
Heading adjustive time : 8 ms
Limitations of the specifications
1. Reading of the reception data and setting of the next transmission data must be completed
within the time obtained from “byte cycle – time for transferring 1-byte data” (in this example,
the time taken from generating of the Serial I/O receive interrupt request to generating of the
next synchronizing clock is 431
μ
s).
2. “Heading adjustive time < interval between blocks” must be satisfied.
S
CLK
Master unit
S
CLK
Slave unit
T
X
D
R
X
D
T
X
D
R
X
D
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