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參數(shù)資料
| 型號： | M37903S4CHP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, 26 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 191K |
| 代理商： | M37903S4CHP |
M37903S4CHP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
2
BLOCK
DIAGRAM
Data bank Register DT (8)
Program Counter PC (16)
Incrementer/Decrementer (24)
Program Bank Register PG (8)
Input Buffer Register IB (16)
Direct Page Register DPR0 (16)
Stack Pointer S (16)
Index Register Y (16)
Index Register X (16)
Arithmetic Logic
Unit (16)
Accumulator B (16)
Accumulator A (16)
Instruction
register
(8)
Central
Processing
Unit
(CPU)
Incrementer (24)
Program Address Register PA (24)
Data Address Register DA (24)
Bus
Interface
Unit
(BIU)
RESET
MD1
Reference
voltage
input
V
REF
(0V)
AV
SS
AVcc
Vcc
External
data
bus
width
select
input
BYTE
Clock
Generating
Circuit
Clock
input
X
IN
CDSEL
X
OUT
Data Buffer DQ0 (8)
Instruction Queue Buffer Q0 (8)
Data Bus (Odd)
Address Bus
A-D
converter
(10)
UART1
(9)
UART0
(9)
Watchdog
timer
Timer
TB1
(16)
Timer
TB2
(16)
Timer
TB0
(16)
D-A
1
converter
(8)
Timer
TA1
(16)
Timer
TA2
(16)
Timer
TA3
(16)
Timer
TA4
(16)
Timer
TA0
(16)
RAM
2048
bytes
MD0
(0V)
Vss
Processor Status Register PS (11)
NMI
D-A
0
converter
(8)
Data Bus (Even)
Data Buffer DQ1 (8)
Data Buffer DQ2 (8)
Data Buffer DQ3 (8)
Instruction Queue Buffer Q1 (8)
Instruction Queue Buffer Q2 (8)
Instruction Queue Buffer Q3 (8)
Instruction Queue Buffer Q4 (8)
Instruction Queue Buffer Q5 (8)
Instruction Queue Buffer Q6 (8)
Instruction Queue Buffer Q7 (8)
Instruction Queue Buffer Q8 (8)
Instruction Queue Buffer Q9 (8)
Direct Page Register DPR1 (16)
Direct Page Register DPR2 (16)
Direct Page Register DPR3 (16)
Clock
output
Reset
input
RD
Read
output
BLW
Write
output
CS
0
CS
0
output
P8(8)
Input/Output
port
P8
P7(8)
Input/Output
port
P7
Input/Output
port
P4
P4(7)
Address
bus/
Input/Output
ports
P0,
P11
P6(8)
Input/Output
port
P6
P5(8)
Input/Output
port
P5
Low-order
data
(8)
Data
bus
P3(2)
Input/Output
port
P3
Low-order
address
(8)
Address
bus
Middle-order
address
(8)
Data
bus/
Input/Output
port
P2
/P11(8)
High-order
address
(8)
/P0(8)
High-order
Data
(8)
/P2(8)
(Note
1)
(Note
2)
Notes
1:
When
the
external
data
bus
width
=
16
bits,
this
serves
as
the
data
bus;
when
the
external
data
bus
width
=
8
bits,
this
serve
s
as
the
I/O
port.
2:
According
to
the
register
setting,
this
can
serve
as
the
I/O
port.
(0V)
(5V)
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