參數(shù)資料
型號: M37733MHBXXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 25 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 54/89頁
文件大小: 1506K
代理商: M37733MHBXXXFP
58
MITSUBISHI MICROCOMPUTERS
M37733MHBXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
Fig. 66 System clock state transition
Main clock : Oscillating
Sub clock : Stopped
I/O ports P77 and P76
f2 : Main-clock side
φ : Main-clock side
Main clock : Oscillating
Sub clock : Stopped
I/O ports P77 and P76
f2 : Main-clock side
(Note 2)
φ : Stopped
Main clock : Stopped
Sub clock : Stopped
I/O ports P77 and P76
WIT instruction
Interrupt
STP instruction
Interrupt
XC is selected
(CM4 = “1”)
Main clock : Oscillating
Sub clock : Oscillating
f2 : Main-clock side
φ : Main-clock side
Main clock : Oscillating
Sub clock : Oscillating
f2 : Main-clock side
(Note 2)
φ : Stopped
Main clock : Stopped
Sub clock : Stopped
f2 : Stopped
φ : Stopped
WIT instruction
Interrupt
STP intrunction
Interrupt
Sub clock is selected as
system clock (Note 1)
(CM3 = “1”)
Main clock : Oscillating
Sub clock : Oscillating
f2 : Sub-clock side
φ : Sub-clock side
Main clock : Oscillating
Sub clock : Oscillating
f2 : Sub-clock side (Note 2)
φ : Stopped
Main clock : Stopped
Sub clock : Stopped
f2 : Stopped
φ : Stopped
WIT instruction
Interrupt
STP intrunction
Interrupt
Main clock
oscillation stops
(CM2 = “1”)
Main clock : Stopped
Sub clock : Oscillating
f2 : Sub-clock side
φ : Sub-clock side
Main clock :Stopped
Sub clock :Oscillating
f2 : Sub-clock side (Note 2)
φ : Stopped
WIT instruction
Interrupt
Reset
Main clock is selected as
system clock (Note 1)
(CM3 = “0”)
Main clock
oscillation starts
(CM2 = “0”)
Notes 1. Before selecting the main/sub clock of which oscillation already starts as the system clock, use software
to fully stabilize the oscillation.
2. When the system clock stop bit at wait state (CM 5) is “1”, f2 stops at wait state.
Main clock : Stopped
Sub clock : Stopped
f2 : Stopped
φ : Stopped
STP instruction
Interrupt
φ : Stopped
f2 : Stopped
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