M37733M4LXXXHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
Some paramentic limits are suject to change.
5
A-D/UART2 trans./rece.
Timer B2
Timer B1
Timer B0
Timer A4
Timer A3
Timer A2
Timer A1
Timer A0
INT
2
/Key input
INT
0
Watchdog timer
DBC
BRK instruction
Zero divide
RESET
Internal peripheral
devices
control registers
refer to Fig. 2 for
detail information
Interrupt vector table
000000
16
00FFFF
16
010000
16
01FFFF
16
Bank 0
16
Bank 1
16
FE0000
16
FEFFFF
16
FF0000
16
FFFFFF
16
Bank FF
16
Bank FE
16
00FFFF
16
008000
16
000000
16
00007F
16
000080
16
Internal RAM
2048 bytes
Internal ROM
32 Kbytes
00FFFE
16
00FFD6
16
00007F
16
000000
16
UART1 transmission
UART1 receive
UART0 transmission
UART0 receive
INT
1
Note.
Internal ROM area can be modified. (Refer to the section on ROM area modification function.)
00FFD6
16
00087F
16
BASIC FUNCTION BLOCKS
The M37733M4LXXXHP has the same functions as the
M37733MHBXXXFP except for the memory allocation, the reset
circuit, the ROM area modification function, and the package.
Refer to the section on the M37733MHBXXXFP.
MEMORY
The memory map is shown in Figure 1. The address space has a
capacity of 16 Mbytes and is allocated to addresses from 0
16
to
FFFFFF
16
. The address space is divided by 64-Kbyte unit called bank.
The banks are numbered from 0
16
to FF
16
.
Built-in ROM, RAM and control registers for internal peripheral devices
are assigned to bank 0
16
.
The 32-Kbyte area from addresses 8000
16
to FFFF
16
is the built-in
ROM. Addresses FFD6
16
to FFFF
16
are the RESET and interrupt
vector addresses and contain the interrupt vectors. Refer to the section
on interrupts for details.
The 2048-byte area allocated to addresses from 80
16
to 87F
16
is the
built-in RAM. In addition to storing data, the RAM is used as stack
during a subroutine call or interrupts.
Peripheral devices such as I/O ports, A-D converter, serial I/O, timer,
and interrupt control registers are allocated to addresses from 0
16
to
7F
16
.
Additionally, the internal ROM area can be modified by software. Refer
to the section on ROM area modification function for details.
A 256-byte direct page area can be allocated anywhere in bank 0
16
by using the direct page register (DPR). In the direct page addressing
mode, the memory in the direct page area can be accessed with two
words. Hence program steps can be reduced.
Fig. 1 Memory map