參數(shù)資料
型號(hào): M37733M4BXXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 25 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 10/31頁
文件大小: 447K
代理商: M37733M4BXXXFP
MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
17
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
Symbol
Parameter
td(E–DQ)
th(E–DQ)
Address output delay time
Address hold time
ALE pulse width
Address output set up time
Address hold time
ALE output delay time
Memory expansion mode and microprocessor mode
(VCC = 5 V ± 10%, VSS = 0 V, Ta = 25 °C, f(XIN) = 25 MHz (Note 1), unless otherwise noted)
Limits
Wait mode
Min.
Max.
Test
conditions
Unit
45
5
12
87
12
75
18
22
57
5
45
9
15
4
10
18
50
130
20
12
87
12
87
18
ns
td(An–E)
td(A–E)
td(ALE–E)
th(E–An)
tw(ALE)
tsu(A–ALE)
th(ALE–A)
tw(EL)
Data output delay time
Data hold delay time
_
E
pulse width
Floating start delay time
Floating release delay time
___
BHE
output delay time
_
R/ W output delay time
___
BHE
hold time
_
R/ W hold time
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
Fig. 6
(Note 2)
φ1 output delay time
tpxz(E–DZ)
tpzx(E–DZ)
td(BHE–E)
td(R/W–E)
th(E–BHE)
th(E–R/W)
td(E–
φ1)
td(
φ1–HLDA)
____
HLDA
output delay time
018
50
Notes 1. This applies when the main clock division selection bit = “0” and f(f2) = 12.5 MHz.
2. No wait : Wait bit = “1”.
Wait 1 : The external memory area is accessed with wait bit = “0” and wait selection bit = “1”.
Wait 0 : The external memory area is accessed with wait bit = “0” and wait selection bit = “0”.
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